Thread Switch for Slow Memory Access Latency
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Solution Overview
Problem
Misallocation of core resources to less efficient program threads can reduce the overall throughput of processors in multithreaded environments, as they continue to await responses from slow memory modules, hindering processing efficiency.
Innovation Solution
The processor suspends execution of program threads accessing slow memory modules, releasing resources for other threads to utilize, thereby improving overall processing efficiency by managing resource allocation based on memory access latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor continues to allocate core resources to program threads accessing slow memory modules, then resource allocation remains simple and uniform, but overall throughput decreases due to resource idle time
Solution Approach 1:
The system dynamically switches thread execution states based on memory access patterns. When a thread accesses slow memory (detected via memory routing table), the processor switches from executing that thread to executing a different thread, thereby dynamically adapting resource allocation to current performance conditions and preventing resource idle time.
Solution Approach 2:
A memory routing table acts as an intermediary between the processor core and memory modules. This routing table provides information about which memory addresses map to slow memory modules, enabling the processor to make informed decisions about thread scheduling and avoid allocating resources to threads that would stall on slow memory accesses.
2Productivity
If the processor switches threads based on memory access latency, then processing efficiency improves, but system complexity increases due to additional switching mechanisms
Solution Approach 1:
The system performs preliminary action by pre-populating a memory routing table that maps memory addresses to their access latency characteristics. This pre-computed routing information is available before thread execution decisions are made, allowing the processor to quickly determine whether to switch threads without performing complex real-time analysis, thereby improving processing efficiency without proportionally increasing system complexity.
Data Source
AI summary
A processing system suspends execution of a program thread based on an access latency required for a program thread to access memory. The processing system employs different memory modules having different memory technologies, located at different points in the processing system, and the like, or a combination thereof. The different memory modules therefore have different access latencies for memory transactions (e.g., memory reads and writes). When a program thread issues a memory transaction that results in an access to a memory module having a relatively long access latency (referred to as “slow” memory), the processor suspends execution of the program thread and releases processor resources used by the program thread. When the processor receives a response to the memory transaction from the memory module, the processor resumes execution of the suspended program thread.