Thread Synchronization at Disparate Memory Addresses
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Solution Overview
Problem
Existing techniques for synchronizing threads in parallel processing compute architectures are inefficient, particularly when threads execute different sets of instructions, as they require a common synchronization instruction at a single memory address, leading to unreliable synchronization and increased complexity.
Innovation Solution
The method involves determining when threads at different memory addresses have executed synchronizing instructions, allowing them to unblock and return to their respective instructions without the need for a synchronization outline function, thereby enabling synchronization at disparate addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a synchronization outline function is used to allow threads to synchronize at different memory addresses, then thread synchronization reliability is improved, but device complexity and processing time increase
Solution Approach 1:
The patent extracts the synchronization logic from a separate outline function and integrates it directly into the instruction streams at the points where synchronization is needed. This allows threads to execute synchronizing instructions at different memory addresses without requiring a common synchronization function, thereby reducing program complexity while maintaining synchronization reliability
Solution Approach 2:
The patent introduces a mediator mechanism that tracks the execution state of multiple threads and coordinates their synchronization without requiring them to converge at a single memory address. This mediator enables reliable synchronization at disparate addresses by managing the blocking and unblocking of threads based on their individual execution paths
2Reliability
If a synchronization outline function is used to allow threads to synchronize at different memory addresses, then thread synchronization reliability is improved, but processing time increases
Solution Approach 1:
The patent performs preliminary setup of synchronization state tracking before threads diverge into different instruction paths. By preparing the synchronization mechanism in advance and allowing threads to block at their respective synchronization points without function call overhead, the system achieves reliable synchronization while minimizing additional processing time
Solution Approach 2:
By removing the function call and return overhead associated with outline functions, the patent allows threads to synchronize directly at instruction level. This extraction of synchronization logic from a separate function eliminates the time penalty of function calls while maintaining the ability to synchronize at different memory addresses
3Device complexity
If all threads are constrained to synchronize at the same memory address, then device complexity is reduced, but thread synchronization reliability deteriorates when threads execute different instruction sets
Solution Approach 1:
The patent segments the synchronization mechanism to allow different subsets of threads to synchronize at different memory addresses. Instead of requiring a single common synchronization point, the system divides synchronization into multiple independent points that can be executed at disparate addresses, thereby maintaining low program complexity while achieving reliable synchronization for threads executing different instruction sets
Solution Approach 2:
The patent extends the synchronization concept from a single-dimensional common address model to a multi-dimensional model where threads can synchronize at different memory addresses. This dimensional change allows threads executing different instruction sets to find their own synchronization points without increasing overall system complexity
Data Source
AI summary
Various embodiments include a parallel processing computer system that enables parallel instances of a program to synchronize at disparate addresses in memory. When the parallel program instances need to exchange data, the program instances synchronize based on a mask that identifies the program instances that are synchronizing. As each program instance reaches the point of synchronization, the program instance blocks and waits for all other program instances to reach the point of synchronization. When all program instances have reached the point of synchronization, at least one program instance executes a synchronous operation to exchange data. The program instances then continue execution at respective and disparate return addresses.