Thread Synchronization for Shared Memory Resource Access

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Solution Overview

Problem

In parallel data processing, managing access to shared memory resources among multiple threads is inefficient due to the need for atomic operations, which are slow, and the lack of consistent ordering among threads, making it difficult to exploit parallel processing in algorithms like radix sort when the number of threads and events becomes large.

Innovation Solution

Implement thread synchronization techniques by assigning unique identifiers to threads and dividing them into subsets to share instances of a shared resource, ensuring only threads with the same ordering index access their instance simultaneously, thus maintaining a consistent order of access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If atomic operations are used to update shared counters, then thread safety is ensured, but processing speed decreases

Engineering Contradiction:
Improvethread safetyVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The shared counter resource is segmented into multiple instances, with each thread assigned to a specific instance based on its thread ID. This segmentation eliminates the need for atomic operations while ensuring thread safety through deterministic assignment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each thread is assigned to a specific counter instance based on its thread ID, creating a localized access pattern. This local quality ensures that each thread safely accesses its designated counter without interfering with other threads, eliminating the need for global atomic operations.

Inventive Principle:
Principle #3Local quality

2Productivity

If each thread has its own set of counters, then threads can proceed independently, but memory space requirement increases

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidmemory space
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

Multiple threads are merged to share common counter instances. Instead of each thread having dedicated counters, threads are grouped and assigned to shared counter instances, reducing total memory usage while maintaining parallel processing efficiency through the merging approach.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Counter instances are designed to serve multiple threads simultaneously. Each counter instance functions universally for all threads assigned to it, allowing the same counter to be used by multiple threads without requiring dedicated counters for each thread.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If conventional atomic operations are used, then counter updates are thread-safe, but consistent ordering among threads cannot be guaranteed

Engineering Contradiction:
Improvecounter update safetyVSAvoidaccess order consistency
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The thread ID parameter is used to determine counter instance assignment and access order. By changing the approach from atomic operation-based safety to parameter-based deterministic assignment, the system achieves both thread safety and consistent ordering through the thread ID parameter.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Thread assignment to counter instances is predetermined based on thread IDs before execution. This preliminary assignment ensures that the access order is established in advance, eliminating the need for atomic operations while guaranteeing consistent ordering among threads.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8108659B1Controlling access to memory resources shared among parallel synchronizable threads
Publication Date: 2012.01.31 NVIDIA CORP
  • US8108659B1 patent drawing
  • US8108659B1 patent drawing
  • US8108659B1 patent drawing

AI summary

Thread synchronization techniques are used to control access to a memory resource (e.g., a counter) that is shared among multiple threads. Each thread has a unique identifier and threads are assigned to instances of the shared resource so that at least one instance is shared by two or more threads. Each thread assigned to a particular instance of the shared resource has a unique ordering index. A thread is allowed to access its assigned instance of the resource at a point in the program code determined by its ordering index. The threads are advantageously synchronized (explicitly or implicitly) so that no more than one thread attempts to access the same instance of the resource at a given time.