Thread Unit Search Engine Merging for Chip Efficiency
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Solution Overview
Problem
The existing instruction processing methods in multi-core and multithreaded network processors result in low chip running efficiency due to frequent state switching between RUN and WAIT states, leading to interrupted instruction processing and repeated steps, which slows down the execution process.
Innovation Solution
The proposed method involves a thread unit sending a search instruction to a search engine unit, which determines the required data and program counters, and then sends a branch search key to a TCAM unit, optimizing the process to require only one state switch from RUN to WAIT, thereby reducing interruptions and accelerating instruction processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the thread unit performs separate search operations for data and program counter, then the search operations can be completed, but the instruction processing speed decreases due to multiple state switches
Solution Approach 1:
The patent merges the data search and program counter search into a single unified search operation. The search engine unit performs both searches simultaneously using the same search key, and returns both results in one operation. This eliminates the need for the thread unit to switch to WAIT state twice, thereby maintaining search accuracy while significantly improving instruction processing speed.
Solution Approach 2:
The search engine unit performs preliminary processing by generating the search key and conducting both searches in advance before the thread unit needs the results. This allows the thread unit to remain in RUN state longer and reduces the frequency of state switches, thus improving overall processing efficiency while ensuring accurate search results are ready when needed.
2Measurement precision
If the thread unit switches state frequently between RUN and WAIT, then the search operations can be completed, but the core running efficiency decreases
Solution Approach 1:
The patent combines multiple search operations into a single unified search process executed by the search engine unit. This merging approach ensures that both data and program counter searches are completed accurately while reducing the number of state transitions the thread unit must perform, thereby minimizing time loss and improving core running efficiency.
Solution Approach 2:
The search engine unit acts as an intermediary that handles the complexity of multiple search operations. It receives the search key, performs both data search and program counter search, and returns both results to the thread unit. This intermediary approach maintains search accuracy while shielding the thread unit from the time-consuming state switch overhead.
3Reliability
If the thread unit performs repeated steps after entering RUN state, then the processing can be completed, but the chip running efficiency decreases
Solution Approach 1:
The search engine unit performs all necessary search operations in advance and returns both data and program counter results in a single operation. This preliminary action ensures that when the thread unit returns to RUN state, it receives all needed information at once, eliminating the need to repeat search steps and improving chip running efficiency while maintaining processing completeness.
Solution Approach 2:
The search engine unit provides comprehensive feedback to the thread unit by returning both data and program counter results in one operation. This feedback mechanism ensures that the thread unit has all necessary information to continue processing without needing to repeat steps, thereby improving chip running efficiency while ensuring reliable and complete processing.
Data Source
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AI summary
Embodiment of this application provide an instruction processing method and a chip. The method is applied to the chip. The chip includes a thread unit and a search engine unit. The method includes: sending, by the thread unit, a search instruction to the search engine unit, where the search instruction includes a data address and a first search field, and the thread unit switches from a RUN state to a WAIT state; and receiving, by the thread unit, data and a program counter that are sent by the search engine unit, where the thread unit switches from the WAIT state to the RUN state. Because the thread unit needs to initiate only one search instruction to obtain the data and the program counter required by the thread unit. Therefore, the thread unit switches from the RUN state to the WAIT state only once, thereby reducing a quantity of times the thread unit switches to the WAIT state. In this way, an instruction processing process of the thread unit is accelerated, and core running efficiency of the chip and running efficiency of the chip are accelerated.