Thread Weave for Heterogeneous ISA Procedure Calls

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Generating code for heterogeneous multiprocessors with different instruction set architectures is complex due to binary incompatibilities and transition complexities, making it difficult for programmers to focus on functional correctness using conventional high-level computer languages.

Innovation Solution

A method involving compiling applications to create CPU ISA objects, pruning unnecessary functions, inserting remote procedure calls, and renaming sections to create a common application library, allowing seamless transitions between processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional high-level computer languages and threading primitives are used for heterogeneous multiprocessors, then programming ease is improved, but code compatibility and execution reliability across binary incompatible cores deteriorates

Engineering Contradiction:
Improveprogramming easeVSAvoidcode compatibility
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces a thread weaver as an intermediary component that sits between the high-level programming language and the heterogeneous processor architecture. The thread weaver translates high-level threading primitives into processor-specific assembly code, enabling programmers to write portable code while ensuring correct execution on binary incompatible cores through systematic translation and adaptation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If separate code generation is performed for each processor architecture, then execution reliability on specific hardware is improved, but device complexity and coding difficulty increases

Engineering Contradiction:
Improveexecution reliabilityVSAvoidcode generation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the code generation process into distinct phases: high-level source code compilation to intermediate representation, thread weaver processing that handles architecture-specific transformations, and final assembly code generation. This segmentation allows each phase to focus on specific tasks, maintaining execution reliability while reducing overall complexity through modular processing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The thread weaver serves multiple functions simultaneously: it acts as a compiler for translating high-level code, a code optimizer for architecture-specific improvements, and a linker for integrating processor-specific routines. This multi-functionality reduces device complexity by consolidating what would otherwise require separate tools and processes

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If procedure calls transition between different processor cores, then system adaptability and resource utilization are improved, but code complexity and transition management difficulty increases

Engineering Contradiction:
Improveresource utilizationVSAvoidtransition management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The thread weaver implements self-service by automatically handling thread migration and procedure call translation between different processor architectures. Rather than requiring manual intervention to manage transitions, the system autonomously translates high-level calls into architecture-specific invocations, optimizing resource utilization while eliminating transition management complexity from the programmer's perspective

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250328400A1Thread weave for cross-instruction set architecture procedure calls
Publication Date: 2025.10.23 MAGIC LEAP INC
  • US20250328400A1 patent drawing
  • US20250328400A1 patent drawing
  • US20250328400A1 patent drawing

AI summary

The invention provides a method of initiating code including (i) storing an application having first, second and third functions, the first function being a main function that calls the second and third functions to run the application, (ii) compiling the application to first and second heterogeneous processors to create first and second central processing unit (CPU) instruction set architecture (ISA) objects respectively, (iii) pruning the first and second CPU ISA objects by removing the third function from the first CPU ISA objects and removing first and second functions from the second CPU ISA objects, (iv) proxy inserting first and second remote procedure calls (RPC's) in the first and second CPU ISA objects respectively, and pointing respectively to the third function in the second CPU ISA objects and the second function in the first CPU ISA objects, and (v) section renaming the second CPU ISA objects to common application library.