Three-Conductor Power Grid for SoC Connectivity
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Solution Overview
Problem
In server on a chip environments, the lack of standardization in power connections between modules and the power grid leads to underpowered modules and inefficient connection processes, as traditional power grid interfaces often fail to connect all power pins due to misalignment and incompatible polarities.
Innovation Solution
A power grid interface comprising three parallel conductors with two polarities, where the middle conductor has a different polarity than the outer two, allowing power pins to connect to the nearest matching conductor, ensuring all power pins are connected without requiring special alignment or custom pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional power grid interfaces with standardized conductors are used, then manufacturing simplicity is maintained, but power pin connection reliability deteriorates due to misalignment and polarity mismatches
Solution Approach 1:
The power grid interface is segmented into three distinct conductor regions: a first conductor region, a second conductor region, and a third conductor region positioned between them. Each region can be independently connected to power pins, allowing modular connection strategies that improve reliability without requiring complete redesign of the entire power grid interface.
Solution Approach 2:
Different regions of the power grid interface are assigned different polarities and connection characteristics. The first and second conductor regions have one polarity while the third conductor region has an opposite polarity, allowing each region to be optimized for specific connection requirements and improving overall connection reliability.
2Reliability
If careful module placement and offsetting are performed to maximize power pin connections, then connection completeness improves, but manufacturing time and labor consumption increase
Solution Approach 1:
The three-conductor power grid interface provides universal connectivity options that can accommodate various module orientations and power pin configurations. The multiple conductor regions with different polarities create a universal interface that works with diverse module designs, eliminating the need for careful custom placement optimization.
Solution Approach 2:
The power grid interface is pre-configured with three conductor regions spanning across the interface area before module placement. This preliminary arrangement of conductors with alternating polarities creates predetermined connection zones that guide module placement and ensure connection completeness without requiring time-consuming iterative optimization.
3Reliability
If modules are designed with non-standard power connections to achieve full connectivity, then connection reliability improves, but manufacturing adaptability deteriorates
Solution Approach 1:
The power grid interface uses an asymmetric three-conductor configuration rather than a symmetric two-conductor design. The third conductor region positioned between the first and second regions creates an asymmetric pattern of polarity zones that enables reliable connectivity for modules with various power pin arrangements while maintaining standardized manufacturing processes.
Data Source
AI summary
Various embodiments provide for flexible and robust power grid connectivity in a server on a chip environment. The power grid has three parallel conductors, (e.g., wires) which represent two power polarities. The outside two wires can be of a first polarity (e.g. Vdd), while the middle wire is of a second polarity (e.g., Vss). The polarities of the wires can also be switched, as long as the two outside wires have the same polarity, while the inside wire has a different polarity. Power pins from modules adjacent to the set of three wires make connections to the nearest wire of the matching polarity. In this way, every power pin on the modules can be connected to the power grid without need for special alignment or custom power pins.