Three-FET High-Voltage Switch Topology for 5 V CMOS
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Solution Overview
Problem
Existing memory devices, particularly those using floating-gate technology, require high-voltages for programming and erasing, which are challenging to manage in low-voltage CMOS processes, necessitating the development of efficient high-voltage switching circuits.
Innovation Solution
The implementation of switch circuits using a chain of three serially coupled field effect transistors (FETs) that receive a high supply voltage and switch it to output a high-voltage signal in response to logic-level control signals, with control/bias circuits providing necessary voltages and timings to ensure safe operation within the 5 V CMOS process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If high-voltage switching is implemented in low-voltage CMOS processes, then memory programming and erasing operations can be performed, but devices may exceed breakdown voltages and suffer damage
Solution Approach 1:
The high-voltage switching function is segmented into three separate FETs connected in series, where each FET handles a portion of the total voltage (e.g., 20V divided among three FETs). This segmentation allows the circuit to achieve high-voltage capability while each individual device operates within its safe breakdown voltage limits, thus resolving the contradiction between adaptability and reliability.
Solution Approach 2:
Control/bias circuits are introduced as intermediary components that generate appropriate control voltages for each FET in the chain. These intermediary circuits ensure that each FET is properly biased and controlled to prevent exceeding breakdown voltages, enabling safe high-voltage switching operation within low-voltage CMOS processes.
2Device complexity
If a single FET is used for high-voltage switching, then the circuit structure is simple, but the FET must withstand the full breakdown voltage which is difficult to achieve in 5V CMOS processes
Solution Approach 1:
Instead of using a single FET that must withstand the full high voltage, the voltage handling function is segmented across three FETs in series. Each FET only needs to withstand a fraction of the total voltage (e.g., ~6.7V each for a 20V system), making it feasible to implement in 5V CMOS processes while maintaining the ability to switch high voltages.
Solution Approach 2:
Three individual FETs are merged into a series chain to collectively achieve the high-voltage switching capability. By combining multiple low-voltage FETs in series, the circuit achieves the equivalent performance of a single high-voltage FET that would otherwise be incompatible with standard CMOS processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable high-voltage switching in low-voltage CMOS processes, preventing devices from exceeding breakdown voltages and ensuring robust operation, thus facilitating the use of high-voltage signals for memory operations without risking device damage.
Implementation Method 1
a chain of at least three serially coupled field effect transistors (FETs). The chain receives the high supply voltage and switches it to output the high-voltage output signal
Data Source
AI summary
Switch circuits are disclosed, for providing a single-ended and a differentially switched high-voltage output signals by switching a high supply voltage in response to at least one logic-level control signal. The switch that provides the single-ended switched high-voltage output signal includes a chain of at least three serially coupled field effect transistors (FETs). The chain receives the high supply voltage and switches it to output the high-voltage output signal. The switch that provides the differentially switched high-voltage output signal includes two differentially coupled chains, each having at least three serially coupled FETs. The chains receive the high supply voltage and switch it to output the differential high-voltage output signal. A control/bias circuit provides a control voltage to at least one of the FETs in the chains, responsive to the control signal.