Three-Layer Pixel Defining Layer for OLED Substrates
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Solution Overview
Problem
Current pixel defining layer structures in organic light-emitting display devices limit the adjustment of film layer thicknesses, leading to restricted electrical performance and increased electrical resistivity due to step differences in the common electrode, affecting yield and reliability.
Innovation Solution
A substrate with a pixel defining layer comprising a three-layer structure, including a conductive second defining layer, which increases ink storage capacity and reduces step differences by positioning the second defining layer partially outside the third defining layer, allowing for thicker film layers and improved electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional pixel defining layer structure is used, then the device structure is simple, but the film layer thickness cannot be adjusted and electrical performance is limited
Solution Approach 1:
The pixel defining layer is divided into three distinct sub-layers: a first pixel defining layer, a second pixel defining layer, and a third pixel defining layer. Each layer can be independently controlled in terms of thickness and material composition, enabling flexible adjustment of film layer thicknesses while maintaining electrical performance. The second pixel defining layer is positioned to extend beyond the third pixel defining layer in at least one region, creating an overlapping structure that allows for optimized thickness control in different areas.
2Adaptability or versatility
If the pixel defining layer thickness is increased to allow thicker film layers, then film layer thickness adjustability is improved, but step differences increase causing higher electrical resistivity
Solution Approach 1:
The second pixel defining layer is strategically positioned to extend beyond the third pixel defining layer in at least one region, creating a localized overlapping structure. This local extension allows the film layer to be thicker in specific regions where additional thickness is needed, while maintaining proper alignment and minimizing step differences in other regions. The overlapping configuration enables localized thickness adjustment without compromising overall electrical performance.
3Reliability
If a single-layer pixel defining structure is used, then manufacturing is simple, but electrical performance is restricted
Solution Approach 1:
The pixel defining layer is segmented into three sub-layers that can be fabricated using sequential deposition or patterning processes. Each sub-layer can be formed using standard thin-film fabrication techniques, and the layers are aligned using conventional photolithography and etching processes. The segmented structure enables independent optimization of each layer's thickness and material properties, improving electrical performance while maintaining compatibility with existing manufacturing processes.
4Reliability
If the pixel defining layer structure is optimized for electrical performance, then electrical resistivity is reduced, but device complexity increases
Solution Approach 1:
The second pixel defining layer is designed to extend beyond the third pixel defining layer in at least one region, creating an asymmetric overlapping structure. This asymmetric configuration allows for optimized electrical pathways and reduced step differences in critical regions, while maintaining a relatively simple overall structure. The asymmetric design enables targeted optimization of electrical performance without requiring complex multi-layer configurations throughout the entire device.
Data Source
AI summary
Embodiments of the present invention provide a substrate and a fabrication method thereof, and a display device. The substrate includes a base and a pixel defining layer in which a plurality of openings are formed, the pixel defining layer includes a first defining layer, a second defining layer and a third defining layer sequentially stacked on the base, wherein, the second defining layer is configured as a conductive layer, and an orthogonal projection of the second defining layer on the base is at least partially located outside an orthogonal projection of a side of the third defining layer close to the base on the base.