Three-Layer Image Sensor Wiring With Aluminum Pads Against Light Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing process of stacked solid-state imaging devices faces challenges in forming deep pad holes, which complicates the process and can lead to defects such as corrosion and light noise due to hot carriers, especially in three-layer stacked structures.
Innovation Solution
A three-layer stacked solid-state imaging device configuration where the first semiconductor substrate has a sensor circuit, the second semiconductor substrate has a logical circuit, and the third semiconductor substrate has a memory circuit, with an aluminum pad in the first substrate to block light from hot carriers and avoid deep pad holes, using a contact or direct bonding for electrical connections between substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through electrodes are used to connect semiconductor substrates, then electrical connection between substrates is achieved, but manufacturing complexity and cost increase due to deep connection holes and insulation requirements
Solution Approach 1:
The patent transitions from vertical through-electrode connections (requiring deep holes penetrating the substrate) to surface-level pad electrode connections. By changing the dimensional approach from depth-oriented to surface-oriented connectivity, the manufacturing complexity is significantly reduced while maintaining electrical connection functionality between stacked substrates.
Solution Approach 2:
The invention extracts the connection function from the substrate interior (through electrodes) and relocates it to the substrate surface (pad electrodes). This extraction eliminates the need for deep connection holes and complex insulation structures within the substrate, simplifying the manufacturing process while preserving electrical connectivity.
2Manufacturing precision
If small contact holes of about 1 micrometer are formed, then connection precision is improved, but substrate must be thinned to the utmost limit requiring complex support substrate attachment
Solution Approach 1:
Instead of forming small vertical contact holes through thinned substrates, the patent uses surface-level pad electrodes that can be formed with standard photolithography techniques. This dimensional shift from depth to surface eliminates the need for extreme substrate thinning and support substrate attachment processes.
3Reliability
If connection holes with high aspect ratio are formed, then electrical connection is achieved, but material selection is limited to CVD films like tungsten
Solution Approach 1:
The connection function is extracted from deep high-aspect-ratio holes to surface-level pad structures. This allows the use of diverse materials including aluminum, copper, and other metals that cannot be deposited in high-aspect-ratio holes, significantly expanding material selection flexibility.
4Reliability
If deep pad holes are formed for external connection, then electrical connection is achieved, but manufacturing cost and complexity increase
Solution Approach 1:
The patent replaces deep vertical pad hole formation with surface-level pad electrode structures. This dimensional change enables standard planar processing techniques to be used, significantly reducing manufacturing cost and complexity while maintaining electrical connection reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies the manufacturing process, reduces the risk of defects, and effectively blocks light from hot carriers, enhancing the quality and reliability of the solid-state imaging device without the need for deep pad holes.
Implementation Method 1
an aluminum pad in the first substrate to block light from hot carriers
Data Source
AI summary
A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.