Three-Layer Image Sensor Interconnects Without Deep Pad Holes

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Solution Overview

Problem

The manufacturing process of stacked solid-state imaging devices faces challenges in forming deep pad holes, which complicates the exposure of external electrodes and increases costs, and in effectively blocking light caused by hot carriers, leading to noise issues.

Innovation Solution

A three-layer stacked solid-state imaging device configuration where the first semiconductor substrate includes a sensor circuit, the second substrate includes a logical circuit, and the third substrate includes a memory circuit, with an aluminum pad in the first substrate to block light and avoid deep pad holes, allowing for electrical connections without the need for complex through-hole structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through electrodes are used to electrically connect multiple semiconductor substrates, then electrical connection between substrates is achieved, but the manufacturing process becomes complex and costly due to the need to form deep connection holes while maintaining insulation

Engineering Contradiction:
Improveelectrical connection between substratesVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from vertical through-hole connections to lateral surface connections. Connection conductors are formed on the surface of semiconductor substrates and extend to peripheral regions, enabling electrical connection between stacked substrates without penetrating through the substrate thickness. This dimensional change from depth to surface eliminates the need for deep hole formation while maintaining electrical connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Connection conductors are formed on the substrate surface before stacking, and peripheral portions of substrates are removed after stacking to expose these pre-formed connection conductors. This preliminary formation of connection paths simplifies the overall process by avoiding post-stack through-hole drilling and conductor embedding.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If small contact holes of about 1 micrometer are formed, then precise electrical connections are achieved, but the upper substrate must be thinned to the utmost limit requiring complex support substrate attachment steps

Engineering Contradiction:
Improvecontact hole precisionVSAvoidsubstrate processing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of forming small vertical contact holes through thinned substrates, the patent forms connection conductors laterally on the substrate surface extending to peripheral regions. This eliminates the need for extreme substrate thinning and support substrate attachment while achieving precise electrical connections through surface-level conductor routing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If connection holes with high aspect ratio are formed, then electrical connection is achieved, but material selection is limited to CVD films with good coatability such as tungsten

Engineering Contradiction:
Improveconnection conductor embeddingVSAvoidconnection conductor material selection
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

Connection conductors are formed on the substrate surface rather than embedded in high aspect ratio holes. This surface-level formation allows use of various materials including aluminum and copper that would be difficult to deposit in deep holes, significantly expanding material selection flexibility while maintaining reliable electrical connection.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If deep pad holes are formed to expose external electrodes, then electrical connection is achieved, but the manufacturing process is complicated and costs increase

Engineering Contradiction:
Improveexternal electrode exposureVSAvoidmanufacturing process simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Connection conductors are formed on the substrate surface before stacking operations. After stacking, peripheral portions are removed to expose these pre-formed connection conductors that serve as external electrodes. This eliminates the need for deep pad hole drilling and electrode exposure operations, simplifying the manufacturing process while achieving the same electrical connection function.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Peripheral portions of the stacked substrates are removed to extract and expose the connection conductors formed earlier. This extraction approach provides external electrode access without requiring deep hole formation through the stacked structure, reducing manufacturing complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration simplifies the manufacturing process, reduces costs, and effectively blocks light from hot carriers, enhancing the quality and reliability of the solid-state imaging device.

Implementation Method 1

an aluminum pad in the first substrate to block light and avoid deep pad holes

Methodology Applied
Scientific EffectLight blocking: Absorption (EM radiation)

Data Source

PatentUS11875989B2Semiconductor device, solid-state imaging device and electronic apparatus
Publication Date: 2024.01.16 SONY GROUP CORP
  • US11875989B2 patent drawing
  • US11875989B2 patent drawing
  • US11875989B2 patent drawing

AI summary

A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.