Three-Level Boost Converter Control for DCM and PFM Loss Reduction

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Solution Overview

Problem

Existing DC-DC converters face challenges in controlling discontinuous conduction mode (DCM) and pulse frequency modulation (PFM) operation in three-level boost converters, leading to increased rectifier and switching losses, especially when dealing with a wide range of input voltages and loads.

Innovation Solution

A three-level switching converter with a control circuit that includes a clock generator, current sense circuits, and a zero current differentiation zone (ZC_DF) circuit, which operates transistors in DCM by turning off the first transistor during a ZC_DF interval when current is negative and in PFM mode by disabling transistor switching in pre-PFM zones based on current sensing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If transistors are operated in discontinuous conduction mode (DCM) without proper zero current differentiation zone control, then switching frequency can be reduced, but rectifier and switching losses increase

Engineering Contradiction:
Improveswitching frequencyVSAvoidrectifier and switching losses
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The control circuit proactively identifies the ZC_DF interval before the fourth transistor turns on, and preemptively turns off the first transistor during this interval. This preliminary action ensures that the first transistor is already off when current becomes negative, preventing rectifier losses without requiring high switching frequency.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If transistors are operated in pulse frequency modulation (PFM) mode with proper pre-PFM zone detection, then efficiency is enhanced at light loads, but control complexity increases

Engineering Contradiction:
ImproveefficiencyVSAvoidcontrol circuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The control circuit continuously monitors the current through the fourth transistor and uses this feedback to detect pre-PFM zones. When the fourth transistor current is zero at the second clock edge, the circuit identifies a pre-PFM zone and adjusts switching accordingly, enabling efficient light-load operation without excessive complexity.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If the converter supports a wide range of input voltages and loads, then adaptability is improved, but difficulty in controlling DCM and PFM operation increases

Engineering Contradiction:
Improveinput voltage and load rangeVSAvoidDCM and PFM control difficulty
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The control circuit introduces intermediate control zones (ZC_DF interval and pre-PFM zone) that act as mediators between different operating modes. These zones provide clear transition criteria based on current sensing, simplifying the control of DCM and PFM operations across a wide input voltage and load range.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12376211B2Three level switching converter and control
Publication Date: 2025.07.29 TEXAS INSTRUMENTS INC
  • US12376211B2 patent drawing
  • US12376211B2 patent drawing
  • US12376211B2 patent drawing

AI summary

A circuit includes first, second third, and fourth transistors coupled in series, and a control circuit coupled to the first, second, third, and fourth transistors. The control circuit includes a clock generator, a current sense circuit, and a zero current differentiation zone (ZC_DF) circuit. The clock generator is configured to generate first and second clocks. The second clock is in quadrature with the first clock. The current sense circuit is configured to sense a current flowing through the first transistor. The ZC_DF circuit is configured to define a ZC_DF interval starting at an edge of the second clock and ending at turn-on of the fourth transistor. The control circuit is configured to operate the first, second, third, and fourth transistors in a discontinuous conduction mode (DCM), and, in DCM, turn off the first transistor during the ZC_DF interval responsive to the current flowing through the first transistor being negative.