Three-Level DAC Cell Pointer Shifting for Linearity Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Digital-to-analog converters using multi-level cells face challenges in compensating for non-linearity due to the characteristics of cells providing three or more different outputs, requiring both improvement of non-linearity between and within cells, while also reducing power consumption and area.
Innovation Solution
A circuit and method for digital-to-analog conversion using 3-level cells with a preprocess circuit generating a shift count for dynamic element matching (DEM), shifting a cell pointer based on thermometer code data, and a shift circuit storing and shifting the cell pointer in proportion to the binary data's absolute value and sign, effectively compensating for non-linearity and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multi-level cells are used to reduce the number of cells and improve integration, then area is reduced, but non-linearity compensation becomes more difficult
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing optimal cell pointer shift values in lookup tables before conversion operations. The preprocess circuit generates shift counts based on thermometer code data in advance, and these are stored for quick retrieval during conversion, eliminating the need for complex real-time non-linearity compensation calculations
Solution Approach 2:
The patent introduces an intermediary element - the cell pointer - that mediates between the digital input code and the analog output. By shifting the cell pointer based on pre-calculated values from lookup tables, the system indirectly compensates for non-linearity without directly modifying the cell characteristics or requiring complex compensation circuits
2Manufacturing precision
If complex non-linearity compensation circuits are added to improve linearity, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent pre-calculates non-linearity compensation values and stores them in lookup tables during the design phase. The preprocess circuit simply retrieves and applies these pre-computed shift counts based on the input code, avoiding the need for complex real-time compensation logic in the converter circuit itself
Solution Approach 2:
The patent replaces complex mechanical or analog compensation circuits with a digital lookup table-based approach. Instead of using complex analog circuits to compensate for non-linearity, the system uses digital memory structures and simple shift operations to achieve the same effect with reduced circuit complexity
3Manufacturing precision
If dynamic element matching with cell pointer shifting is implemented, then linearity is improved, but power consumption increases
Solution Approach 1:
The patent pre-calculates and stores all necessary cell pointer shift values in lookup tables before operation. During conversion, the system only performs simple table lookups and pointer shifts based on the input code, minimizing the computational energy required during active conversion operations compared to real-time complex calculations
Solution Approach 2:
The patent uses periodic action by implementing dynamic element matching that cycles through different cell combinations based on the input code. The cell pointer shifts periodically through different positions according to the pre-calculated sequence, distributing the activation across multiple cells and reducing the power burden on any single cell while maintaining linearity
Data Source
AI summary
A circuit for digital-to-analog conversion using a plurality of 3-level cells includes a circuit for digital-to-analog conversion using a plurality of 3-level cells mutually independently providing positive electricity, providing negative electricity, or floating. The circuit including a preprocess circuit and a shift circuit. The preprocess circuit is configured to receive thermometer code data generated from signed binary data and generate a shift count for shifting a cell pointer pointing to one of the plurality of 3-level cells for dynamic element matching (DEM) from the thermometer code data. The shift circuit is configured to store the cell pointer and shift the stored cell pointer according to the shift count. The shifted cell pointer is shifted in proportion to an absolute value of the binary data in a direction depending on a sign of the binary data.


