Three-Level Input Detection Circuit for Stable Open-Input Sensing

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Solution Overview

Problem

Current digital logic circuits can only detect two input levels, 'true' and 'false', and are unstable and power-consuming when an open input is applied, as they rely on pull-up or pull-down resistors to maintain stability, which limits their ability to differentiate between different voltage inputs.

Innovation Solution

An apparatus comprising a resistive voltage divider and multiple inverters, where the voltage divider is coupled between supply potential terminals and the inverters are configured to provide distinct output voltages for different input voltages, allowing for three-level input detection by differentiating between a first voltage, a second voltage, and an open input.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If pull-up or pull-down resistors are used to maintain stability for open inputs, then the input stability is improved, but the power consumption increases

Engineering Contradiction:
Improveinput stabilityVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The voltage detection function is segmented into multiple independent inverter stages (first inverter, second inverter, third inverter) each handling specific voltage ranges. This segmentation allows each stage to operate optimally without requiring continuous current from pull-up/pull-down resistors, reducing power consumption while maintaining stability for open inputs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A voltage divider circuit is introduced as an intermediary between the input signal and the inverter stages. The voltage divider transforms the input voltage into scaled voltages that can be properly detected by the inverter stages, enabling stable detection of open inputs without requiring high current pull-up or pull-down resistors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If only two levels are detected corresponding to true and false, then the circuit simplicity is maintained, but the ability to differentiate between different voltage inputs is limited

Engineering Contradiction:
Improvecircuit simplicityVSAvoidvoltage input differentiation capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The detection capability is extended from two dimensions (true/false) to three dimensions by adding a third detection level for open inputs. This is achieved by introducing additional inverter stages and voltage divider taps, allowing the circuit to detect not only logical true and false but also the intermediate open input state, thereby enhancing adaptability while maintaining reasonable circuit simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables stable and efficient three-level input detection, reducing power consumption by using inverters with different supply voltages and level shifters to convert output voltages, effectively differentiating between applied voltages and open inputs, thereby improving input signal detection in digital logic circuits.

Implementation Method 1

a resistive voltage divider and at least two inverters, wherein the resistive voltage divider is coupled between a first supply potential terminal (VDD) and a second supply potential terminal (VSS)

Methodology Applied
Scientific EffectVoltage division: Ohm's Law

Data Source

PatentUS8749272B1Apparatus and method for three-level input detection
Publication Date: 2014.06.10 TEXAS INSTRUMENTS INC
  • US8749272B1 patent drawing
  • US8749272B1 patent drawing
  • US8749272B1 patent drawing

AI summary

The present disclosure relates to an Apparatus comprising at least one resistive voltage divider and at least two inverters, wherein the resistive voltage divider is coupled between a first supply potential terminal (VDD) and a second supply potential terminal (VSS), wherein the voltage divider comprises a first resistor, a second resistor, a third resistor and a fourth resistor being serially connected, and wherein a first connection point of the second resistor and the third resistor is connected to an voltage input, and a second connection point of the first resistor and the second resistor is connected to the input side of a first inverter, and a third connection point of the third resistor and the fourth resistor is connected to the input side of a second inverter, wherein the first inverter and the second inverter are configured to provide a first output voltage if a first voltage is applied to the voltage input, and the first inverter and the second inverter are configured to provide a second output voltage if a second voltage is applied to the voltage input, and the first inverter is configured to provide the second output voltage and the second inverter is configured to provide the first output voltage if an open input is applied to the voltage input as well as a method.