Three-Operand Add Instructions for Large Integer Multiplication
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Solution Overview
Problem
Existing add instructions, such as ADD and ADC, are limited to adding only two operands, which can hinder efficient data processing in scenarios requiring three-way addition, particularly in large number multiplication where carry and overflow flags are crucial.
Innovation Solution
The introduction of new add instructions, like ADD3 and ADOC3, which allow for the addition of three operands and utilize additional flags to store and manage carry and overflow, enabling efficient handling of larger sums and reducing the need for multiple instructions in large integer multiplication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional ADD and ADC instructions are used, then only two operands can be added, but this limits efficiency in scenarios requiring three-way addition
Solution Approach 1:
The patent combines multiple addition operations into a single instruction by merging the addition of three operands (SRC1, SRC2, and SRC3) into one atomic operation. This is achieved by extending the traditional two-operand ADD/ADC instruction format to accommodate three source operands that are added simultaneously and stored in the destination operand, thereby improving productivity without requiring multiple sequential instructions.
Solution Approach 2:
The invention creates a universal add instruction that can handle both traditional two-operand addition and new three-operand addition scenarios. The instruction set architecture is extended to support both modes, allowing the same instruction mechanism to adapt to different operational requirements (two-operand for compatibility, three-operand for enhanced efficiency in large number multiplication).
2Productivity
If multiple ADD/ADC instructions are used for three-way addition, then existing instruction compatibility is maintained, but this increases instruction count and reduces efficiency
Solution Approach 1:
The patent merges three separate addition operations (adding SRC1, SRC2, and SRC3) into a single atomic instruction. Instead of executing multiple sequential ADD/ADC instructions, the new instruction performs all three additions simultaneously in one cycle, reducing the instruction count and eliminating the complexity of managing multiple instruction sequences while maintaining hardware simplicity.
Solution Approach 2:
The instruction is segmented into distinct operational components: adding SRC1 to the destination, adding SRC2 to the result, adding SRC3 to the result, and managing carry/overflow flags. This internal segmentation allows the complex three-way addition to be broken down into manageable operational steps within a single instruction execution cycle.
3Productivity
If three-way addition is implemented, then large number multiplication efficiency is improved, but this requires additional flags for carry and overflow management
Solution Approach 1:
The patent reuses existing carry and overflow flags (CF and OF) to serve dual purposes: managing carries/overflows from the first addition (SRC1 + DEST) and from the second addition (SRC2 + RESULT). This multi-functional use of existing flags avoids the need for entirely new flag registers, thereby improving multiplication efficiency while limiting the increase in device complexity to already-present components.
Solution Approach 2:
The instruction incorporates feedback mechanisms where the carry flag from the first addition becomes an input to the second addition operation, and similarly for overflow. This feedback loop allows the flags to dynamically adjust based on the actual arithmetic operations performed, enabling efficient three-way addition while using existing flag infrastructure rather than requiring additional complex flag management hardware.
Data Source
AI summary
A method in one aspect may include receiving an add instruction. The add instruction may indicate a first source operand, a second source operand, and a third source operand. A sum of the first, second, and third source operands may be stored as a result of the add instruction. The sum may be stored partly in a destination operand indicated by the add instruction and partly a plurality of flags. Other methods are also disclosed, as are apparatus, systems, and instructions on machine-readable medium.