Three-Slope Gate Driver for Power Switches

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Solution Overview

Problem

Existing driver circuits face challenges in reducing electromagnetic interference (EMI) while minimizing switching losses, primarily due to high rates of current change (dI/dt) and variable turn-on delays caused by threshold voltage and load current variations.

Innovation Solution

A three-slope gate drive method for power switches, which includes rapid, intermediate, and high slope voltage changes to manage EMI and switching losses, along with a closed-loop control system to adjust the gate precharge voltage and maintain constant turn-on delay times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a high rate of current change (dI/dt) is used during switching, then switching speed is improved, but electromagnetic interference (EMI) increases

Engineering Contradiction:
Improveswitching speedVSAvoidelectromagnetic interference
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The gate drive waveform is segmented into three distinct slope regions: a first rapid slope region for quick voltage establishment, a second intermediate slope region for controlled current rise, and a third rapid slope region for final switch activation. This segmentation allows each region to optimize for different objectives, reducing overall EMI while maintaining switching speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate drive circuit dynamically adjusts the voltage slope through a three-stage process: initially applying a rapid slope to quickly reach the Miller plateau voltage, then transitioning to an intermediate slope to control the current rise rate, and finally applying a rapid slope again when the switch is fully on. This dynamic adjustment resolves the contradiction between switching speed and EMI reduction.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If a large rate of change of voltage (dv/dt) is used, then switching losses are reduced, but current change rate (dI/dt) increases causing EMI

Engineering Contradiction:
Improveswitching lossesVSAvoidelectromagnetic interference
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The voltage change process is divided into three segments with different dv/dt characteristics. The first segment provides rapid voltage rise to minimize dead-time losses, the second segment controls the current rise rate to limit EMI, and the third segment rapidly completes the switching action. This segmentation allows optimization of both switching losses and EMI.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit dynamically modulates the gate voltage slope through three distinct phases, adjusting dv/dt in real-time based on the switching state. This dynamic control achieves large overall dv/dt for reduced switching losses while limiting dI/dt during the critical current rise phase to reduce EMI.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If threshold voltage and load current variations are not compensated, then device complexity is reduced, but turn-on delay time becomes variable

Engineering Contradiction:
Improvedevice complexityVSAvoidturn-on delay time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The driver circuit incorporates feedback mechanisms that monitor the gate voltage and adjust the drive waveform accordingly. This feedback allows the circuit to compensate for threshold voltage and load current variations, maintaining consistent turn-on delay times without requiring complex external compensation circuits.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The driver circuit performs self-compensation for threshold voltage and load current variations through its inherent three-slope waveform generation and feedback control. This self-service capability maintains consistent timing characteristics without requiring additional external components or complex adjustment mechanisms.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7667524B2Driver circuit and method with reduced DI/DT and having delay compensation
Publication Date: 2010.02.23 INFINEON TECHNOLOGIES AMERICAS CORP
  • US7667524B2 patent drawing
  • US7667524B2 patent drawing
  • US7667524B2 patent drawing

AI summary

A method of driving a power transistor switch comprising: receiving a drive input signal; converting the drive input signal into a converted drive input signal; and providing the converted gate drive input signal to a control electrode of the switch to turn on the switch, the converted drive input signal having three regions with respect to time, each having a slope, a first region in time having a first slope up to a Miller Plateau of the switch; a second region in time having a second slope with a reduced slope compared with the first slope; and a third region having a third slope that is greater than the second slope, whereby the control electrode voltage rapidly reaches the Miller Plateau voltage, then more slowly reaches a threshold voltage of the switch and then, when the switch has substantially fully turned on, the control electrode voltage is rapidly increased. The switch delay time is also maintained substantially constant by adjusting the transistor control electrode precharge voltage.