Three-Stage Operational Amplifier for High-Voltage Precise Amplification

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Solution Overview

Problem

Conventional operational amplifiers face challenges in handling high voltages and large currents, achieving stable and precise amplification, and maintaining stability with negative feedback, especially in scanning electron microscopes, due to limitations in manufacturing and package technology.

Innovation Solution

The operational amplifier design includes a first-stage differential-pair with a base-grounded amplification circuit cascode-connected to a cascode-connected transistor pair, a second-stage inverter with an emitter follower circuit and constant-current load, and a third-stage source follower circuit, enabling high voltage and current handling while maintaining satisfactory direct-current characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an IC-implemented transistor pair is used as a first-stage differential pair, then manufacturing precision is improved, but voltage handling capability deteriorates due to low withstand voltage

Engineering Contradiction:
Improvemanufacturing precisionVSAvoidvoltage handling capability
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The amplifier is divided into three distinct stages: first-stage differential pair with active load, second-stage inverter with emitter follower, and third-stage source or emitter follower. This segmentation allows each stage to be optimized for specific functions, with the first stage handling differential signaling and the subsequent stages providing voltage buffering and current handling capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate buffering stages between the differential pair and the output. The second-stage inverter with emitter follower circuit acts as an intermediary that converts the differential signal to single-ended output while providing voltage buffering, and the third-stage follower provides current buffering, thereby protecting the sensitive IC differential pair from high voltage and current conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If voltage amplification is performed by a base-grounded circuit cascode-connected to the differential pair, then voltage gain is improved, but recovery from supersaturation deteriorates

Engineering Contradiction:
Improvevoltage gainVSAvoidrecovery time from supersaturation
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The patent employs dynamic circuit configurations in the second and third stages that can rapidly transition between operating states. The emitter follower circuits in the second and third stages provide low output impedance that helps quickly discharge saturation charges, enabling fast recovery from supersaturation while maintaining high voltage gain through the cascode-connected base-grounded circuit in the first stage.

Inventive Principle:
Principle #15Dynamics

3Power

If a differential amplifier is used at a second stage, then voltage amplification is improved, but load effect on the first stage deteriorates

Engineering Contradiction:
Improvevoltage amplificationVSAvoidload effect on first stage
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent introduces the second-stage inverter with emitter follower circuit as an intermediary between the first-stage differential pair and any subsequent differential amplifier. This intermediary provides high input impedance that minimizes loading on the first stage, and low output impedance that can drive the second differential stage without affecting the first stage's operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Each stage is designed with specific local characteristics optimized for its function: the first stage has high input impedance for differential signaling, the second stage has high input impedance to minimize loading on the first stage while providing voltage buffering, and the third stage has low output impedance for current driving capability. This local optimization ensures that each stage performs its specific function without adversely affecting other stages.

Inventive Principle:
Principle #3Local quality

4Stability of the object's composition

If phase compensation is facilitated by inserting a resistor into emitters of the first-stage differential pair, then phase compensation is improved, but direct-current characteristics deteriorate

Engineering Contradiction:
Improvephase compensationVSAvoiddirect-current characteristics
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The patent separates the phase compensation function from the direct-current characteristic optimization by implementing phase compensation in the second and third stages rather than in the first-stage differential pair. This segmentation allows the first stage to maintain excellent DC characteristics while subsequent stages provide the necessary phase compensation through their circuit configurations and compensation capacitors.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7521998B2Operational amplifier and scanning electron microscope using the same
Publication Date: 2009.04.21 HITACHI HIGH TECH SCI SYST
  • US7521998B2 patent drawing
  • US7521998B2 patent drawing
  • US7521998B2 patent drawing

AI summary

An operational amplifier and a scanning electron microscope which are capable of dealing with high voltage and large current, and which allow implementation of stable and precise amplification, the operational amplifier having a first-stage amplification unit including a differential pair, a base-grounded amplification circuit, and an active load, the base-grounded amplification circuit being cascode-connected to the differential pair a second-stage amplification unit including an inverter having an emitter follower circuit and a constant-current load circuit, and a third-stage amplification unit including a source follower circuit or an emitter follower circuit.