Three-State Latch Using OAI Gates for Deterministic Multi-State Storage
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Solution Overview
Problem
Conventional multiple-latch circuits require additional circuitry for interpreting and controlling combined states, leading to slower operation, reduced determinism, and indeterminate states due to asynchronous transitions between latches.
Innovation Solution
A single latch circuit with three stable states is implemented using cascaded logical gates configured as OR-AND-Invert (OAI) gates, allowing all outputs to reflect input changes within three gate delays and retaining the previous state when all inputs are set to one, enabling deterministic storage of more than two states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple latches are combined to store more than two states, then the number of stored states increases, but the circuit operation speed decreases due to additional control circuitry
Solution Approach 1:
The patent combines multiple latch functions into a single three-state latch circuit that can store more than two states. This merging approach eliminates the need for separate multiple-latch circuits and their associated control logic, thereby improving operation speed while maintaining the capability to store multiple states.
Solution Approach 2:
The three-state latch is designed to perform multiple functions: it can store more than two states, provide deterministic state transitions, and eliminate the need for external interpretation circuitry. This multi-functionality allows a single circuit to replace what would traditionally require multiple specialized components.
2Quantity of substance
If multiple latches are combined to store more than two states, then the storage capacity increases, but the device area increases due to additional circuitry
Solution Approach 1:
By merging multiple latch functions into a single three-state latch, the patent significantly reduces the total device area. The single-latch architecture eliminates redundant circuit elements and interconnections that would be present in a multiple-latch configuration, achieving higher storage capacity in a smaller footprint.
3Adaptability or versatility
If multiple latches are used to represent desired states, then the state representation capability increases, but the determinism of state transitions decreases due to asynchronous operations
Solution Approach 1:
The three-state latch is designed with self-synchronizing feedback mechanisms that automatically coordinate state transitions without requiring external control logic. The internal feedback paths ensure that all state changes occur in a deterministic sequence, eliminating the timing uncertainties inherent in multiple independent latches.
4Adaptability or versatility
If additional control circuitry is added to interpret combined latch states, then the state interpretation capability improves, but the circuit complexity increases
Solution Approach 1:
The patent extracts the state interpretation function from external control circuitry and integrates it directly into the three-state latch structure. This extraction eliminates the need for separate interpretation logic, reducing overall circuit complexity while maintaining full state interpretation capability.
Data Source
AI summary
Three state latch. In accordance with a first embodiment, an electronic circuit includes n pairs of cascaded logical gates. Each of the n pairs of cascaded logical gates includes a first logical gate including n−1 first gate inputs and one first gate output, and a second logical gate including two second gate inputs and one second gate output. One of the second gate inputs is coupled to the first gate output. The second gate output is cross coupled to one of the first gate inputs of all other the pairs of cascaded logical gates, and n is greater than 2.