Three-Terminal MTJ Memory Stack for Multi-State In-Memory Computing

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Solution Overview

Problem

Current digital SOT and STT magnetic tunnel junction (MTJ) devices in MRAMs suffer from inefficiencies in terms of energy and space consumption due to the use of multiple memory cells, which affect their operation in in-memory compute applications, particularly in artificial intelligence operations.

Innovation Solution

A three-terminal MTJ device configuration is introduced, decoupling read and write bit lines and incorporating an antiferromagnetic material to enable spin orbit torque (SOT) and spin Hall effect (SHE) mechanisms, allowing for multiple resistance states through domain nucleation and multidomain switching, reducing energy and space requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple MTJ cells are used in digital SOT and STT MRAM implementations, then memory capacity and computational functionality are improved, but energy consumption and space requirements increase

Engineering Contradiction:
Improvecomputational functionalityVSAvoidenergy consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple MTJ cells into a single integrated device structure where multiple ferromagnetic layers with different magnetization directions (in-plane and perpendicular magnetization) coexist in one device. This merging approach enables the device to store multiple bits of information and perform computational operations while reducing the overall number of discrete cells required, thereby lowering energy consumption and space requirements compared to using separate MTJ cells for each computational unit

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single MTJ device is designed to perform multiple functions: it can store multiple bits of information through different magnetization configurations, perform logical operations through spin transfer torque and spin orbit torque mechanisms, and serve as both memory and computational unit. This multi-functionality eliminates the need for separate memory cells and computational units, reducing overall energy consumption and device footprint

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If multiple MTJ cells are used in digital SOT and STT MRAM implementations, then memory capacity and computational functionality are improved, but device footprint and space consumption increase

Engineering Contradiction:
Improvememory capacityVSAvoiddevice footprint
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent implements a nested structure where multiple ferromagnetic layers are stacked vertically within a single MTJ device footprint. The device contains a first ferromagnetic layer with in-plane magnetization, a second ferromagnetic layer with perpendicular magnetization, and additional intermediate layers, all nested within the same device structure. This vertical nesting enables high memory capacity while maintaining a compact lateral footprint

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from a two-dimensional arrangement of multiple separate MTJ cells to a three-dimensional stacked structure within a single device. By utilizing the vertical dimension with multiple ferromagnetic layers at different heights (first layer, second layer, intermediate layers), the device achieves high memory capacity without increasing the lateral footprint, effectively moving the scaling direction from planar to vertical

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If antiferromagnetic material and multidomain switching mechanisms are incorporated, then multiple resistance states and memory states are achieved, but device structure complexity increases

Engineering Contradiction:
Improvemultiple resistance statesVSAvoiddevice structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies different magnetic properties to different local regions: the first ferromagnetic layer has in-plane magnetization while the second ferromagnetic layer has perpendicular magnetization, and intermediate layers have specific compositions (such as Ru or Ir) to provide exchange coupling. This local differentiation of magnetic properties enables multiple stable resistance states without requiring complex external control mechanisms, as each layer's magnetization behavior is optimized for its specific function within the overall device architecture

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed MTJ device achieves energy, time, and space-efficient memory computing by enabling multiple memory states with reduced energy consumption and compact footprint, suitable for applications like neuromorphic computing and neural networks.

Implementation Method 1

Spin orbit torque (SOT) mechanisms manipulate local magnetizations controlled by external magnetic fields

Methodology Applied
Scientific EffectSpin orbit torque (SOT):

Implementation Method 2

SOT results from pure spin current, with no net charge currents generated by the associated spin Hall effect (SHE)

Methodology Applied
Scientific EffectSpin Hall effect (SHE):

Implementation Method 3

STT refers to the effect by a spin polarized charge current in magnetic materials when there exists a magnetization spatial gradient

Methodology Applied
Scientific EffectSpin transfer torque (STT):

Implementation Method 4

allowing for multiple resistance states through domain nucleation and multidomain switching

Methodology Applied
Scientific EffectDomain nucleation: Nucleation

Data Source

PatentUS12484457B2Differentially programmable magnetic tunnel junction device and system including same
Publication Date: 2025.11.25 INTEL CORP
  • US12484457B2 patent drawing
  • US12484457B2 patent drawing
  • US12484457B2 patent drawing

AI summary

A memory device, an integrated circuit component including an array of the memory devices, and an integrated device assembly including the integrated circuit component. The memory devices includes a first electrode; a second electrode including an antiferromagnetic (AFM) material; and a memory stack including: a first layer adjacent the second electrode and including a multilayer stack of adjacent layers comprising ferromagnetic materials; a second layer adjacent the first layer; and a third layer adjacent the second layer at one side thereof, and adjacent the first electrode at another side thereof, the second layer between the first layer and the third layer, the third layer including a ferromagnetic material. The memory device may correspond to a magnetic tunnel junction (MTJ) magnetic random access memory bit cell, and the memory stack may correspond to a MTJ device.