Three-Terminal Electronic Synapse Device with Doped Chalcogenide Layer
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Solution Overview
Problem
Conventional two-terminal electronic synaptic devices exhibit non-linear and unstable analog characteristics, which are not ideal for mimicking the gradual changes in biological synapses, and most three-terminal devices face compatibility issues with CMOS processing.
Innovation Solution
A three-terminal electronic synapse device is designed with a doped chalcogenide layer and electrodes, where the gate electrode is used to decouple write/read operations, allowing for stable analog characteristics and linear conductance changes, and is compatible with CMOS processing by using a dopant layer or electrically conductive material for the electrode contact layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional two-terminal electronic synaptic devices are used, then device simplicity is maintained, but non-linear conductance change and unstable analog characteristics occur
Solution Approach 1:
The device is segmented into three terminals (source, drain, and gate electrodes) instead of using a conventional two-terminal structure. This segmentation allows independent control of charge injection (via gate electrode) and readout (via source-drain current), enabling stable analog characteristics and linear conductance changes while maintaining relatively simple device architecture
Solution Approach 2:
The gate electrode acts as an intermediary that decouples the write and read operations. By controlling the gate voltage, charge can be injected into or extracted from the chalcogenide layer without directly affecting the readout path between source and drain electrodes, thus achieving stable analog behavior and linear conductance modulation
2Reliability
If three-terminal electronic synapse devices are used, then stable analog characteristics and linear conductance changes are achieved, but CMOS compatibility issues arise
Solution Approach 1:
The electrode contact layer composition is varied to achieve both low contact resistance and CMOS compatibility. By adjusting the dopant concentration and material composition in the electrode contact layer, the device achieves stable analog characteristics while using materials and processes compatible with standard CMOS fabrication
Solution Approach 2:
The electrode contact layer is designed as a composite structure combining electrically conductive material with dopant. This composite approach enables simultaneous achievement of low contact resistance (from conductive material) and CMOS process compatibility (from dopant integration), resolving the manufacturing challenge of three-terminal devices
3Device complexity
If non-doped chalcogenide layer is used, then material simplicity is maintained, but non-linear and unstable conductance changes occur
Solution Approach 1:
Dopant is introduced locally at the electrode-chalcogenide interface rather than uniformly throughout the entire chalcogenide layer. This localized doping creates regions with different electrical properties: the doped contact regions provide stable, linear conductance modulation, while the undoped bulk maintains material simplicity and enables analog behavior
Solution Approach 2:
The dopant concentration in the chalcogenide layer is optimized to achieve the desired balance between material simplicity and performance. By controlling the dopant amount and distribution, stable analog characteristics and linear conductance changes are achieved while maintaining relatively simple material composition and fabrication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves stable analog characteristics and linear conductance changes, enabling multiple states and analog switching behaviors, while being compatible with CMOS processing, thus addressing the limitations of previous devices.
Implementation Method 1
a body including a doped chalcogenide layer including a chalcogenide material and a dopant
Implementation Method 2
Stable analog characteristics and linear changes of the conductance have been demonstrated
Data Source
AI summary
Various embodiments may provide an electronic synapse device. The electronic synapse device may include a body including a doped chalcogenide layer including a chalcogenide material and a dopant. The electronic synapse device may also include a drain electrode in contact with the body. The electronic synapse device may further include a source electrode in contact with the body. The electronic synapse device may additionally include a gate electrode including an electrode contact layer in contact with the doped chalcogenide layer. The electrode contact layer may be any one selected from a group consisting of an electrically conductive layer including an electrically conductive material and a dopant layer including the dopant.