Three-Transistor Pixel Circuit for Low-Power Grayscale Display
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Solution Overview
Problem
Existing display devices, particularly high-resolution panels used in Head Mounted Displays (HMDs), require improved pixel designs to efficiently manage power and signal transmission for accurate grayscale expression and reduced power consumption.
Innovation Solution
A pixel design incorporating multiple transistors and capacitors, including a Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with body electrodes, and a specific timing scheme for transistor states, along with power lines and scan lines, to control light emission and threshold voltage compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple transistors and capacitors are added to improve grayscale expression and power management, then display accuracy and power efficiency are improved, but device complexity increases
Solution Approach 1:
The pixel circuit is segmented into multiple functional blocks: first transistor for current control, second transistor for data signal input, third transistor for emission control, and multiple capacitors for voltage storage and threshold compensation. Each component has a specific function that collectively achieves accurate grayscale expression while managing power consumption efficiently.
Solution Approach 2:
The patent utilizes parameter changes in transistor states (on/off states) and capacitor voltages to control light emission intensity. By changing the voltage levels stored in capacitors and the conduction states of transistors during different time periods, precise grayscale control is achieved without requiring additional complex components.
2Loss of energy
If transistor states are optimized and power management is improved, then power consumption is reduced, but control complexity increases
Solution Approach 1:
The pixel operation is divided into periodic time periods with specific transistor states: During the first time period, the second and third transistors are turned on to initialize capacitors; During the second time period, the second transistor is turned on while the third is turned off to compensate for threshold voltage; During the third time period, the first transistor is turned on to control light emission. This periodic control pattern reduces power consumption while maintaining manageable control complexity through systematic timing.
Solution Approach 2:
Capacitors are pre-charged to specific voltages during initialization periods before the actual display operation. The first and second capacitors are charged during the first time period, and threshold voltage compensation is performed during the second time period, preparing the circuit for efficient operation during the emission period, thereby reducing overall power consumption.
3Measurement precision
If high-resolution panel is used in HMD, then display quality is improved, but power consumption and heat generation increase
Solution Approach 1:
The light emitting element maintains continuous controlled emission during the third time period based on the stored voltage in the first capacitor, ensuring stable high-resolution display output. The circuit maintains ready states in capacitors during idle periods, allowing quick response without repeated power surges, thus reducing overall power consumption while sustaining high display quality.
Data Source
AI summary
A pixel includes: a first transistor including first, second, and gate electrodes, which are respectively connected to first, second, and third nodes; a second transistor connected between a data line and the third node, the second transistor including a gate electrode electrically connected to a first scan line; a third transistor connected between a first power line to which a voltage of a first driving power source is supplied and the first node, the third transistor including a gate electrode electrically connected to an emission control line; a first capacitor connected between the first and third nodes; a second capacitor connected between the second and third nodes; a third capacitor connected between the third node and a second power line to which a voltage of a second driving power source is supplied; and a light emitting element connected between the second node and the second power line.