Three-way Switch Array for 3D Memory Stacking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current solder-free universal circuit boards and memory arrays are limited to two-dimensional layouts, restricting space utilization and preventing the vertical stacking of electronic components and memory cells, which is necessary for constructing three-dimensional electronic circuits and memory arrays.
Innovation Solution
A three-way switch array structure and substrate based on Non-Volatile Memory (NVM) with N first connectors, M second connectors, and N×M third connectors, each featuring three-way switches with first and second terminals and memory cells, allowing for a three-dimensional layout by vertically stacking components and memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional connectors are used for electronic component configuration, then ease of manufacture is maintained, but space utilization rate cannot be improved
Solution Approach 1:
The patent transitions from two-dimensional planar connectors to three-dimensional立体 connectors. The third connectors extend vertically from the substrate surface, enabling electronic components to be connected in the vertical direction rather than only in the plane, thus dramatically improving space utilization rate by utilizing the Z-axis dimension for component arrangement.
Solution Approach 2:
The patent implements a hierarchical connector structure where first connectors and second connectors are integrated with the substrate, and third connectors are formed vertically from the substrate surface. This nested arrangement allows multiple connector types to coexist in a compact configuration, maintaining ease of manufacture while enabling three-dimensional component placement.
2Quantity of substance
If memory cells are arranged in two-dimensional array, then manufacturing process is simple, but vertical stacking of memory cells is prevented
Solution Approach 1:
The patent extends the memory array from two-dimensional planar arrangement to three-dimensional vertical stacking. Multiple memory cells are stacked vertically along the Z-axis direction, with each memory cell accessible through dedicated third connectors. This vertical stacking dramatically increases memory cell density without significantly complicating the fabrication process, as it utilizes standard semiconductor stacking techniques.
3Area of stationary object
If traditional two-dimensional layout is used, then device complexity is low, but space utilization is restricted
Solution Approach 1:
The patent introduces three-way switches with first terminals, second terminals, and third terminals arranged in three dimensions. The first terminals connect to first connectors, second terminals to second connectors, and third terminals extend vertically to connect to third connectors. This three-dimensional switch array structure enables efficient routing of signals in multiple directions, dramatically improving space utilization while managing complexity through systematic terminal arrangement.
Data Source
AI summary
A three-way switch array structure including N first connectors, M second connectors, N×M third connectors and N×M three-way switches is provided, each three-way switch has a first terminal, a second terminal, a third terminal, a first switch and a second switch. Each of first terminals is disposed on one of the first connectors, each of second terminals is disposed on one of the second connectors, and each of third terminals is disposed on one of the third connectors, the first switch is disposed between the first terminal and the third terminal, and the second switch is disposed between the second terminal and the third terminal, wherein N and M are positive integers greater than or equal to 1.