Threshold-Based Port Arbitration for Priority Memory Transactions

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Solution Overview

Problem

Existing memory systems fail to distinguish between different traffic streams, leading to inefficient allocation of resources and potential critical delays in processing high-priority transactions.

Innovation Solution

Implementing port arbitration circuitry that dynamically allocates resources based on user-defined parameters, applying backpressure to lower-priority traffic streams when threshold quantities are reached, ensuring higher-priority transactions are processed efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory systems process all traffic streams uniformly without distinction, then device complexity is reduced, but productivity decreases due to inefficient resource allocation and delays in high-priority transactions

Engineering Contradiction:
Improvetransaction processing efficiencyVSAvoidport arbitration circuitry
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system segments traffic streams into different priority levels (first priority and second priority) and processes them through separate arbitration pathways. The port arbitration circuitry identifies priority indicators in incoming transactions and routes them to appropriate processing queues, ensuring high-priority transactions receive immediate attention while maintaining systematic organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The port arbitration circuitry acts as an intermediary between incoming traffic streams and the memory system's processing resources. It intercepts transactions, determines their priority based on indicators in the transaction data, and mediates their entry into the processing pipeline by applying backpressure to lower-priority streams when resources are constrained.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If backpressure is applied to throttle lower-priority traffic streams, then high-priority transaction processing is improved, but loss of time increases for lower-priority transactions

Engineering Contradiction:
Improvehigh-priority transaction processing speedVSAvoidlower-priority transaction delay
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The backpressure application is dynamic rather than static. The port arbitration circuitry continuously monitors the state of high-priority transaction queues and adjusts backpressure levels on lower-priority streams accordingly. When high-priority queues are full, backpressure is applied; when they have capacity, backpressure is reduced or released, allowing lower-priority transactions to proceed without unnecessary delays.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of transaction flow rate dynamically based on priority and system state. By adjusting the effective throughput parameter for different priority streams in real-time, the system optimizes overall performance while minimizing unnecessary delays to lower-priority transactions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12411625B2Port arbitration
Publication Date: 2025.09.09 MICRON TECHNOLOGY INC
  • US12411625B2 patent drawing
  • US12411625B2 patent drawing
  • US12411625B2 patent drawing

AI summary

Apparatuses and methods related to port arbitration of a memory system are described. A memory system can receive a first number of transactions and a second transaction from a first traffic stream and a third number of transactions and a fourth transaction from a second traffic stream. The memory system can process the first number of transactions at least partially concurrently with the third number of transactions. Responsive to a total quantity of transactions of the first number of transactions and the second transaction being at least a threshold quantity of transactions, the second transaction can be processed by the memory system and, subsequent to processing the second transaction, the fourth transaction can be processed by the memory system.