Threshold-Based Barrier Synchronization Circuit for Parallel Processing

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Solution Overview

Problem

In parallel information processing systems, existing barrier synchronization methods lead to prolonged waiting times and reduced processing speed due to the need for all threads to complete their processes before proceeding, which is inefficient in scenarios where some error is acceptable.

Innovation Solution

A barrier synchronization circuit that determines when a threshold number of processing circuits have completed their processes and forcibly stops incomplete processes, allowing for AC parallelization, which reduces waiting time and improves processing speed by enabling partial completion and estimation-based continuation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If barrier synchronization waits for all threads to complete before proceeding, then processing accuracy is maintained, but processing speed deteriorates due to prolonged waiting times

Engineering Contradiction:
Improveprocessing accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies partial action by allowing the barrier synchronization to proceed when a threshold number of threads (e.g., 9 out of 10) have completed, rather than waiting for all threads. This partial completion approach maintains acceptable processing accuracy while significantly improving processing speed by avoiding unnecessary waits for the remaining threads.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If all threads must complete the process before proceeding, then result reliability is improved, but waiting time increases

Engineering Contradiction:
Improveresult reliabilityVSAvoidwaiting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the parameter from requiring 100% thread completion to a threshold-based completion (e.g., 90% or configurable threshold). This parameter change allows the system to proceed with barrier synchronization when the threshold is met, thereby reducing waiting time while maintaining sufficient result reliability for applications that can tolerate some error.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If the system enforces strict synchronization for all threads, then processing precision is maintained, but productivity decreases

Engineering Contradiction:
Improveprocessing precisionVSAvoidparallel processing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent introduces dynamic barrier synchronization where the synchronization point is flexible rather than fixed. The barrier can be triggered dynamically when the threshold condition is met, allowing the system to adapt between strict synchronization (when all threads complete) and relaxed synchronization (when threshold is met), thereby balancing processing precision with parallel processing efficiency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11709718B2Barrier synchronization circuit, barrier synchronization method, and parallel information processing apparatus
Publication Date: 2023.07.25 FUJITSU LTD
  • US11709718B2 patent drawing
  • US11709718B2 patent drawing
  • US11709718B2 patent drawing

AI summary

A barrier synchronization circuit that performs barrier synchronization of a plurality of processes executed in parallel by a plurality of processing circuits, the barrier synchronization circuit includes a first determination circuit configured to determine whether the number of first processing circuits among the plurality of the processing circuits is equal to or greater than a first threshold value, the first processing circuits having completed the process, and an instruction circuit configured to instruct a second processing circuit among the plurality of the processing circuits to forcibly stop the process when it is determined that the number is equal to or greater than the first threshold value by the first determination circuit, the second processing circuit having not completed the process.