Threshold Voltage Circuit Using Charge Redistribution for Fast Reception
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Solution Overview
Problem
Existing threshold generator circuits for comparator circuits in receiver devices require always-on clocks and result in non-negligible preamble times to set the comparator threshold voltage, limiting data encoding and power efficiency in communication systems.
Innovation Solution
A threshold voltage generator circuit using a sample-and-hold architecture with capacitors and switching circuitry that rapidly and adaptively generates the threshold voltage at the beginning of signal reception, eliminating the need for always-on clocks and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional threshold generator circuits are used, then the comparator threshold voltage can be set, but always-on clocks are required and preamble times are non-negligible
Solution Approach 1:
The patent implements a periodic sampling action where the threshold voltage is generated only when needed (on receipt of a start-of-packet signal) rather than continuously. The circuit periodically samples the differential signal to establish the threshold voltage, eliminating the requirement for always-on clocks and reducing preamble time while maintaining reliable threshold setting.
Solution Approach 2:
The circuit performs preliminary action by pre-charging capacitors to reference voltages before the actual threshold generation occurs. When the start-of-packet signal is detected, the capacitors are already prepared and can quickly establish the threshold voltage through charge redistribution, avoiding delays associated with gradual charging during the preamble period.
2Reliability
If traditional threshold generator circuits are used, then the comparator threshold voltage can be set, but power consumption increases due to always-on clocks
Solution Approach 1:
The circuit transitions from continuous operation to periodic operation, activating the threshold generation mechanism only when a start-of-packet signal is detected. This periodic activation eliminates power consumption during idle periods while ensuring the threshold voltage is reliably established when data reception occurs.
Solution Approach 2:
The patent extracts the always-on clock requirement from the threshold generation process. By using edge-triggered flip-flops and start-of-packet signals to initiate threshold generation, the circuit removes the continuous clocking mechanism that caused high power consumption, retaining only the essential function of threshold voltage setting.
3Adaptability or versatility
If variable gain amplifiers or resistors are used, then threshold voltage adjustment is possible, but device complexity increases
Solution Approach 1:
The patent uses a simplified copying mechanism where the threshold voltage is established by charge redistribution between capacitors that are pre-charged to reference voltages. Instead of using complex variable gain amplifiers or resistive dividers, the circuit copies reference voltage levels onto the comparator input through controlled charge transfer, achieving threshold adjustment with simpler components.
Solution Approach 2:
The circuit achieves threshold voltage adjustment by changing the charge state of capacitors rather than using variable physical components. By controlling the charging and discharging of fixed capacitors through switching circuitry, the threshold voltage can be dynamically adjusted without requiring variable gain amplifiers or resistors, thereby reducing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables fast and adaptive generation of the threshold voltage within the bit time of the first received bit, reducing preamble times and power consumption, and allowing for correct sampling of data signals without the need for variable gain amplifiers or resistors.
Implementation Method 1
a first capacitor, a second capacitor... The first switching circuitry is switchable between a first configuration, where a first terminal of the first capacitor is coupled to the first signal input node... thereby charging the first capacitor to the second DC voltage
Implementation Method 2
a first capacitor, a second capacitor... a first terminal of the second capacitor is coupled to the bias circuit, thereby charging the second capacitor to the first DC voltage
Implementation Method 3
subsequently set the first switching circuitry in the second configuration in response to an edge detected in the clock signal, thereby producing the first threshold voltage at the first output node after charge redistribution taking place between the first and second capacitors
Data Source
Figure 1~2
Figure 3~4
Figure 5
AI summary
A threshold generator circuit (90) includes a clock node for receiving a clock signal (Clk), a signal node for receiving a modulated signal (Vamp) switching between a first and a second DC voltage, a bias circuit (92) for producing a bias voltage (Vdc) equal to the first DC voltage, an output node for producing the threshold voltage (Vth), a first capacitor (C1), a second capacitor (C2), and switching circuitry (S 1, S2, S3). The switching circuitry is switchable between a first configuration, where the first capacitor is coupled to the signal node, the second capacitor is coupled to the bias circuit, and the two capacitors are decoupled from each other, and a second configuration, where the first capacitor is decoupled from the signal node, the second capacitor is decoupled from the bias circuit, and the two capacitors are coupled to each other and to the output node. The circuit further comprises control circuitry (94, 96, 98) configured to: - initially set the switching circuitry in the first configuration in response to the modulated signal (Vamp) having the second DC voltage, thereby charging the first capacitor (C1) to the second DC voltage and charging the second capacitor (C2) to the first DC voltage, and - subsequently set the switching circuitry in the second configuration in response to an edge detected in the clock signal (Clk; CK), thereby producing the threshold voltage (Vth) at the output node after charge redistribution taking place between the first and second capacitors (C1, C2).