Threshold-Voltage Camouflaged Logic Gate for Low-Overhead IC Security

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Solution Overview

Problem

Conventional camouflage techniques for preventing circuit theft through reverse engineering often increase chip area, power consumption, and delay time, while also being costly and difficult to integrate with existing processes, and they complicate interfacing with other logic due to dynamic operations.

Innovation Solution

A memory-type camouflaged logic gate using transistors with different threshold voltages, combined with a multiplexer, allows for selective operation as various logic gates based on memory data, preventing reverse engineering by adjusting output signals and reducing the number of candidate logic gates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional camouflage techniques are applied to prevent circuit theft through reverse engineering, then security against reverse engineering is improved, but chip area increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the threshold voltage parameter of transistors to create different functional behaviors. By using transistors with different threshold voltages (Vth) in the memory cell, the same physical structure can represent multiple logic gates (NAND, NOR, XOR) depending on the Vth values, thereby preventing reverse engineering without increasing chip area

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The memory cell structure is designed to serve multiple functions by varying transistor threshold voltages. The same memory cell can emulate different logic gates (NAND, NOR, XOR) based on the Vth values of its transistors, making a single structure universal for multiple logic functions and avoiding the need for separate camouflaged structures for each gate type

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If conventional camouflage techniques are applied to prevent circuit theft through reverse engineering, then security against reverse engineering is improved, but power consumption increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent utilizes threshold voltage as a controlling parameter to determine logic gate functionality. By adjusting Vth values of transistors in the memory cell, the circuit can switch between different logic operations without requiring additional power-intensive components or structures, thus maintaining low power consumption while achieving security

Inventive Principle:
Principle #35Parameter changes

3Reliability

If conventional camouflage techniques are applied to prevent circuit theft through reverse engineering, then security against reverse engineering is improved, but delay time increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoiddelay time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes transistor threshold voltage parameters to achieve different logic functions within the same circuit structure. This approach avoids the need for complex additional circuitry that would increase delay time, as the Vth-based differentiation occurs at the transistor level without adding significant propagation delays

Inventive Principle:
Principle #35Parameter changes

4Reliability

If conventional camouflage techniques are applied to prevent circuit theft through reverse engineering, then security against reverse engineering is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent achieves security by varying transistor threshold voltage parameters, which can be controlled during standard manufacturing processes through techniques like doping concentration adjustment. This approach maintains compatibility with existing manufacturing workflows without requiring complex additional fabrication steps or specialized equipment

Inventive Principle:
Principle #35Parameter changes

5Reliability

If conventional camouflage techniques are applied to prevent circuit theft through reverse engineering, then security against reverse engineering is improved, but interfacing with static logic becomes difficult

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoidinterfacing with static logic
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The memory cell is designed with a unified structure that can represent multiple logic gates through threshold voltage variations. This universal design maintains consistent input-output interfaces regardless of which logic function is active, making interfacing with static logic straightforward and avoiding the need for different interface circuits for different gate types

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents chip theft through reverse engineering without increasing chip area, power consumption, or delay, while maintaining compatibility with static logic and reducing costs, thus overcoming limitations of previous methods.

Implementation Method 1

respective threshold voltages of the first P-channel transistor and the second P-channel transistor may be different from each other, or respective threshold voltages of the first N-channel transistor and the second N-channel transistor may be different from each other

Methodology Applied
Scientific EffectThreshold voltage difference:

Data Source

PatentUS11671101B2Memory-type camouflaged logic gate using transistors with different threshold voltages
Publication Date: 2023.06.06 ELECTRONICS & TELECOMM RES INST
  • US11671101B2 patent drawing
  • US11671101B2 patent drawing
  • US11671101B2 patent drawing

AI summary

Disclosed herein is a memory-type camouflaged logic gate using transistors having different threshold voltages. The camouflaged logic gate may include two or more candidate logic gates, memory, the output signal of which is adjusted based on two or more transistors having different threshold voltages, and a multiplexer for selectively outputting the output of one of the two or more candidate logic gates depending on the output signal of the memory.