Threshold Voltage Measurement Circuit for Fast FET Testing
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Solution Overview
Problem
Conventional methods for measuring threshold voltage in field effect transistors (FETs) are slow due to high parasitic capacitances in measurement circuits, limiting high-speed measurements and requiring large areas for stabilization, making them unsuitable for sub-microsecond measurements across a wide range of currents.
Innovation Solution
The proposed solution involves a measurement circuit with reduced amplifying stages and isolation of high parasitic capacitance, using a current mirror and unity-gain feedback circuits to achieve sub-microsecond threshold voltage measurements across a wide range of currents, from 10 nA to 1 mA, by simplifying stabilization and reducing the required area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If conventional measurement circuits with multiple amplifying stages are used, then measurement stability is improved, but measurement speed deteriorates due to high parasitic capacitances
Solution Approach 1:
The patent extracts and removes high parasitic capacitance elements from the measurement circuit path. Specifically, the circuit architecture isolates large capacitances (such as probe pad capacitances) from the critical measurement signal path, allowing the use of simplified amplifying stages without sacrificing stability, thereby enabling sub-microsecond measurement speeds
Solution Approach 2:
The measurement circuit is segmented into distinct functional blocks with controlled impedance interfaces. The circuit divides the measurement path into stages with managed capacitance loading, allowing each stage to be optimized independently - the first stage handles high-impedance nodes with minimal capacitance while subsequent stages provide buffering and stabilization
2Measurement precision
If conventional measurement circuits are used, then measurement accuracy is improved, but circuit area increases due to large stabilization requirements
Solution Approach 1:
The patent changes the electrical parameters of the measurement circuit, specifically optimizing the gain-bandwidth product and noise characteristics of the amplifying stages. By carefully selecting operating points and feedback configurations, the circuit achieves high measurement precision with reduced component values, thereby minimizing the required circuit area while maintaining accuracy across the full current range
3Reliability
If conventional measurement circuits are used, then stability across process variations is improved, but measurement delay increases beyond sub-microsecond range
Solution Approach 1:
The patent implements feedback mechanisms in the measurement circuit to actively compensate for process, temperature, and voltage variations. The feedback loops continuously adjust operating parameters to maintain measurement accuracy and stability, enabling the circuit to achieve sub-microsecond response times while remaining robust against environmental and manufacturing variations
Data Source
AI summary
A measurement circuit may include a transistor having a first terminal, a second terminal, and a third terminal, wherein the first terminal is coupled to a first reference voltage. The measurement circuit may further include a first operational amplifier including a first input coupled to the second terminal of the transistor and an output coupled to the third terminal of the transistor. The first operational amplifier may further include a second input configured to receive a second reference voltage. The measurement circuit may also include a first unity-gain voltage follower including a second operational amplifier having a first input coupled to the first input of the first operational amplifier. Methods of measuring a threshold voltage, semiconductor devices, and electronic systems are also described.