Thresholded Min-Sum LDPC Decoding for Lower Error Floors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional LDPC decoders face high error floors at high SNRs due to problematic graphical objects, leading to decoding failures, and existing methods to mitigate this require additional hardware or complexity, such as post-processing or increased precision.

Innovation Solution

A threshold-based modification to the min-sum algorithm (MSA) that selectively applies attenuation or offset to variable node log-likelihood ratios, determining reductions based on comparisons with a threshold, thereby reducing the error floor without requiring knowledge of problematic object locations or structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional min-sum algorithm is used, then implementation complexity is low, but error floor performance deteriorates at high SNRs

Engineering Contradiction:
Improvedecoder complexityVSAvoiderror floor performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies different attenuation values to different messages based on their magnitude relative to a threshold. Messages with magnitude below the threshold receive one attenuation value, while messages above the threshold receive a different attenuation value. This local differentiation resolves the contradiction by improving error floor performance through selective message treatment without requiring complete system redesign.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a threshold parameter and uses it to dynamically select attenuation values for messages. By changing the attenuation parameter based on message magnitude relative to the threshold, the system improves reliability at high SNRs while maintaining the simplicity of the min-sum algorithm framework.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If uniform attenuation is applied to all messages, then implementation is simple, but error floor performance deteriorates

Engineering Contradiction:
Improveimplementation simplicityVSAvoiderror floor performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent moves from uniform attenuation to selective attenuation where different attenuation values are applied based on local message characteristics (magnitude relative to threshold). This resolves the contradiction by maintaining implementation simplicity through a clear decision rule while improving error floor performance through differentiated message treatment.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces dynamic selection of attenuation values based on message magnitude and threshold comparison. Instead of static uniform attenuation, the system dynamically adjusts attenuation per message, resolving the contradiction between implementation simplicity and error floor performance.

Inventive Principle:
Principle #15Dynamics

3Reliability

If message precision is increased, then error floor performance improves, but hardware cost and memory requirements increase

Engineering Contradiction:
Improveerror floor performanceVSAvoidhardware cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent improves error floor performance by changing the attenuation parameter selection based on message magnitude and threshold, rather than increasing message precision. This resolves the contradiction by achieving better reliability through algorithmic parameter adaptation without requiring additional hardware resources for higher precision representation.

Inventive Principle:
Principle #35Parameter changes

4Reliability

If post-processing is applied to accept errors, then error floor performance improves, but chip space, power consumption, and latency increase

Engineering Contradiction:
Improveerror floor performanceVSAvoidchip space
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies attenuation adjustment during the decoding process itself, before final decision making. By selectively attenuating messages based on threshold comparison during iteration, the system prevents error propagation at its source rather than requiring additional post-processing stages, thus improving error floor performance without increasing chip space.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and addresses the root cause of error floor (inappropriate message attenuation) directly within the decoding algorithm, rather than adding separate post-processing blocks. This resolves the contradiction by improving reliability through core algorithm modification without adding external hardware components.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11962324B1Threshold-based min-sum algorithm to lower the error floors of quantized low-density parity-check decoders
Publication Date: 2024.04.16 ARROWHEAD CENTER INC
  • US11962324B1 patent drawing
  • US11962324B1 patent drawing
  • US11962324B1 patent drawing

AI summary

A modified version of the min-sum algorithm (“MSA”) which can lower the error floor performance of quantized LDPC decoders. A threshold attenuated min-sum algorithm (“TAMSA”) and/or threshold offset min-sum algorithm (“TOMSA”), which selectively attenuates or offsets a check node log-likelihood ratio (“LLR”) if the check node receives any variable node LLR with magnitude below a predetermined threshold, while allowing a check node LLR to reach the maximum quantizer level if all the variable node LLRs received by the check node have magnitude greater than the threshold. Embodiments of the present invention can provide desirable results even without knowledge of the location, type, or multiplicity of such objects and can be implemented with only a minor modification to existing decoder hardware.