Through-Die Via Interface Routing Across Interrupted IC Tracks

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Solution Overview

Problem

The via-last fabrication process for forming stacked-die integrated circuit devices, such as FPGAs, faces challenges in designing wiring layers with sufficient connectivity due to through die vias interrupting horizontal and vertical wiring tracks, leading to insufficient connectivity across the die.

Innovation Solution

The method involves forming metal layers with horizontal and vertical wiring tracks, and through die vias, where horizontal wiring segments are electrically coupled across the vias to connect interrupted wiring tracks, and vertical wiring segments are added to couple with these segments, enhancing connectivity across the die.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through die vias are formed in the via-last process, then vertical interconnection between stacked dies is achieved, but horizontal wiring tracks are interrupted reducing connectivity

Engineering Contradiction:
Improvevertical interconnectionVSAvoidhorizontal connectivity
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces wiring segments in a third metal layer (different dimension from the interrupted wiring tracks) to bridge connections across through-die vias. By utilizing an additional metal layer dimension, the invention restores horizontal connectivity that was interrupted by vertical vias without compromising the via-last fabrication process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses intermediary wiring segments in the third metal layer that connect to both sides of interrupted wiring tracks through vias. These intermediary segments act as mediators to restore horizontal signal paths that were broken by through-die vias, enabling continuous routing across multiple metal layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If additional metal layers are formed to connect through die vias, then connectivity is improved, but device complexity increases

Engineering Contradiction:
ImproveconnectivityVSAvoidmetal layer structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the wiring function across multiple metal layers, with specific wiring segments placed in the third metal layer to handle connections across through-die vias. This segmentation allows different metal layers to have specialized functions, improving overall connectivity while maintaining manageable complexity through functional division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The third metal layer serves multiple functions: it provides horizontal wiring segments to bridge interrupted tracks, establishes vertical connections through additional vias, and enables both signal and power routing. This multi-functionality justifies the added complexity by delivering diverse connectivity solutions from a single structural addition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8089299B1Integrated circuit with through-die via interface for die stacking and cross-track routing
Publication Date: 2012.01.03 XILINX INC
  • US8089299B1 patent drawing
  • US8089299B1 patent drawing
  • US8089299B1 patent drawing

AI summary

An integrated circuit die is described that includes an array of tiles arranged in columns. The integrated circuit die includes interface tiles having at least one row of through die vias. The integrated circuit die includes metal layers that include horizontal wiring tracks and metal layers that include vertical wiring tracks. At least some of the metal layers having vertical wiring segments include horizontal wiring segments. Each horizontal wiring segment is coupled to a first wiring segment of a horizontal wiring track that is interrupted by the at least one row of through die vias and is coupled to a second wiring segment of the horizontal wiring track that is interrupted by the at least one row of through die vias. Each horizontal wiring segment extends between the at least one row of through die vias and at least one row of through die vias in an adjoining interface tile.