Through Electrode With Depressed Side Wall for 3D Integration
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Solution Overview
Problem
Conventional methods for three-dimensional integration of semiconductor devices are costly due to the complex processes involved in forming and connecting conductors for vertical electrical connections, limiting the widespread adoption of this technology.
Innovation Solution
A semiconductor structure with a through electrode is developed, comprising a lamination body with vertically aligned electrode parts, a through-hole with a depressed side wall, and an insulating layer, which is filled with a conductive material to establish vertical electrical connectivity with fewer processes and reduced costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional multi-layered TSV structures are used with separate substrate joining, then vertical electrical connection is achieved, but the number of processes increases and manufacturing cost increases
Solution Approach 1:
The patent merges the formation of through-electrodes across multiple layers into a single integrated process. Instead of forming TSVs separately in each substrate and then joining them, the invention forms through-electrodes simultaneously through stacked layers during the lamination process, eliminating multiple separate formation and connection processes.
Solution Approach 2:
The patent performs preliminary actions by pre-forming electrode parts and apertures in each layer before stacking. The electrode parts are prepared in advance with appropriate apertures, and the through-holes are formed preliminarily during lamination, with insulating layers pre-deposited on side walls before final conductive material filling.
2Reliability
If conventional multi-layered TSV structures are used with separate substrate joining, then vertical electrical connection is achieved, but manufacturing cost increases
Solution Approach 1:
The patent combines multiple manufacturing steps into fewer integrated processes. The lamination process simultaneously achieves layer stacking, through-hole formation, and electrical connection establishment, reducing the total number of manufacturing steps and associated costs.
Solution Approach 2:
The patent employs self-alignment mechanisms where the vertically aligned electrode parts and apertures in stacked layers automatically guide through-hole formation and conductive material filling, eliminating the need for complex alignment processes and reducing manufacturing complexity.
3Ease of manufacture
If through-holes are formed without depressed side walls, then formation process is simpler, but insulating layer coverage and electrical connection reliability are compromised
Solution Approach 1:
The patent introduces asymmetry in the through-hole geometry by forming depressed parts on the side walls. This asymmetric structure with overhanging portions provides better mechanical interlocking and ensures complete insulating layer coverage, improving electrical connection reliability while maintaining manufacturing feasibility.
Solution Approach 2:
The depressed parts on the side walls create curved or rounded geometries that improve insulating layer deposition and adhesion. The curved surfaces of the depressed parts ensure uniform insulating layer coverage and better contact between conductive materials and electrode parts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves vertical electrical connectivity while reducing the number of processes and costs associated with forming through-electrodes, enhancing the feasibility of three-dimensional integration.
Implementation Method 1
forming a through-hole by anisotropic etching using a mask to expose the electrode part of the uppermost layer only of the semiconductor structure
Implementation Method 2
applying isotropic etching to the through-hole to form a depressed part on a side wall in the through-hole between the electrode parts
Data Source
AI summary
A semiconductor structure including a through electrode includes a lamination body including at least three layers, including respective vertically aligned electrode parts, the electrode part on the surface of an uppermost layer and including an aperture, the electrode part of the intermediate layer having an aperture smaller than the aperture of the uppermost layer; a through-hole extending from the aperture of the electrode part on the uppermost layer to the surface of the electrode part on a lowermost layer, the through-hole having a depressed part on a side wall thereof between the electrode parts therein; an insulating layer disposed on the entire side wall in the through-hole at a part other than on surfaces of the electrode parts; and a conductive material filling the through-hole from the surface of the electrode part on the lowermost layer to the surface of the electrode part on the uppermost layer.


