Through Electrode Flush Surface Underfill Void Prevention
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Solution Overview
Problem
In chip-stacked semiconductor packages, voids often form in the underfill between stacked semiconductor chips due to narrow gaps, leading to increased impedance and reduced reliability of electrical connections, especially when using through electrodes for connection.
Innovation Solution
A semiconductor package design featuring a semiconductor substrate with through holes and insulative layers, where the through electrodes are flush with the substrate surface, and an insulative film covers the inner walls, facilitating even underfill distribution and preventing void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If through electrodes are used to electrically connect stacked semiconductor chips, then wiring length is shortened and package is miniaturized, but gaps between chips become extremely narrow making it difficult for underfill to enter evenly, causing void formation
Solution Approach 1:
The patent applies preliminary action by forming the insulative film to cover the inner wall surfaces of through holes before filling the underfill material. This pre-prepared surface structure guides the underfill to flow evenly through the gaps between stacked chips, preventing void formation. The insulative film acts as a preliminary prepared pathway that ensures uniform underfill distribution even in the extremely narrow gaps created by through electrode structures.
2Reliability
If underfill is filled between stacked semiconductor chips, then electrical connection reliability is improved, but voids form in the underfill due to narrow gaps, causing gas expansion and cracks during reflow process
Solution Approach 1:
The patent introduces an insulative film as an intermediary element that covers the inner wall surfaces of through holes. This intermediary structure serves multiple functions: it provides a smooth surface that facilitates even underfill flow, prevents underfill from adhering to the through electrode surfaces where voids would form, and eliminates gas pockets that would expand during reflow. The insulative film mediates between the underfill material and the through electrode structure, ensuring reliable electrical connection without void-related defects.
3Reliability
If wire bonding is used to electrically connect semiconductor chips to substrate, then electrical connection is achieved, but fine wires increase impedance and package size is enlarged due to wire loop region requirements
Solution Approach 1:
The patent extracts and eliminates the wire bonding structure entirely, replacing it with a direct through-electrode connection approach. By removing the fine wires and wire loops from the package structure, the invention simultaneously reduces impedance (improving electrical connection quality for high-speed chips) and eliminates the wire loop region that would enlarge the package. The through electrodes provide direct vertical electrical pathways through the stacked chips, achieving both compact size and reliable high-speed electrical connection.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, which includes a through hole that extends through the semiconductor substrate. An insulative layer includes a first surface, an opposite second surface covering the semiconductor substrate, and an opening aligned with the through hole. An insulative film covers an inner wall surface of the semiconductor substrate and the opening. A through electrode is formed in the through hole and the opening inward from the insulative film. The through electrode includes a first end surface that forms a pad exposed from the first surface of the insulative layer. The first end surface of the through electrode is flush with the first surface of the insulative layer.