Through Electrode Insulation Testing in Stacked Semiconductor Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Stacked semiconductor devices face challenges in detecting slight short-circuit defects in through electrodes, which can lead to operation defects only after chips are stacked, resulting in reduced product yield.

Innovation Solution

A method and device configuration that includes test wiring and switches to isolate the through electrode from the internal circuit during testing, allowing for the application of a predetermined potential and detection of current flow, enabling the identification of slight short-circuit defects before stacking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional testing methods are used during wafer fabrication, then manufacturing process is simple, but slight short-circuit defects in through electrodes cannot be detected

Engineering Contradiction:
Improvedefect detection capabilityVSAvoidtesting structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the through electrode testing by introducing separate test wiring and switch elements that isolate the through electrode from the internal circuit during testing. This segmentation allows independent testing of the through electrode without affecting other circuit components, enabling detection of slight short-circuit defects that would otherwise be masked by the complex internal circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces test wiring and switch elements as intermediary components between the through electrode and the internal circuit. These intermediaries enable controlled potential application and current measurement without directly interfacing with the complex internal circuit, thus facilitating precise defect detection while managing system complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If chips are stacked without thorough testing, then productivity is high, but operation defects occur after stacking due to undetected short-circuit defects

Engineering Contradiction:
Improveproduct yieldVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements preliminary testing of through electrodes during the wafer fabrication process, before chips are separated and stacked. By performing the insulation resistance measurement at this early stage using the test wiring and switch mechanism, potential defective chips are identified and eliminated before they can cause operation defects in the final stacked product, thus improving reliability without significantly impacting productivity.

Inventive Principle:
Principle #10Preliminary action

3Loss of information

If through electrodes are tested in connection with internal circuit, then device structure is simple, but defect location cannot be differentiated

Engineering Contradiction:
Improvedefect location informationVSAvoidtesting circuit complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent extracts the through electrode testing function from the internal circuit by introducing separate test wiring and switch elements. This extraction allows the testing mechanism to be temporarily connected to the through electrode without the interference of the internal circuit, enabling clear differentiation of defect locations between through electrodes and internal circuits while maintaining overall device structure simplicity.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the accurate detection and elimination of defective chips with slight short-circuit defects, enhancing product yield by ensuring only defect-free chips are stacked, and differentiates between internal circuit and through electrode defects.

Implementation Method 1

A method and device configuration that includes test wiring and switches to isolate the through electrode from the internal circuit during testing, allowing for the application of a predetermined potential and detection of current flow

Methodology Applied
Scientific EffectElectrical potential and current flow detection: Ohm's Law

Data Source

PatentUS8847221B2Stacked semiconductor device and method of testing the same
Publication Date: 2014.09.30 LONGITUDE LICENSING LTD
  • US8847221B2 patent drawing
  • US8847221B2 patent drawing
  • US8847221B2 patent drawing

AI summary

A stacked semiconductor device includes: an internal circuit; a through electrode provided to penetrate through a semiconductor substrate; a test wiring to which a predetermined potential different from a substrate potential is supplied at a time of a test; a first switch arranged between the through electrode and the internal circuit; a second switch arranged between the through electrode and the test wiring; and a control circuit that exclusively turns on the first and the second switches. Thereby, it becomes possible to perform an insulation test in a state that the through electrode and the internal circuit are cut off. Thus, even when a slight short-circuit that does not lead to a current defect occurs, the short circuit can be detected.