Through Electrode Formation Using Sacrificial Layer Pattern
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Solution Overview
Problem
In semiconductor device manufacturing, the formation of through electrodes is hindered by parasitic capacitance, misalignment issues, and thermal stress, particularly due to the high diffusivity of copper in silicon substrates and challenges in achieving a desired aspect ratio and alignment of through-silicon vias (TSVs) in three-dimensional wafer stack packages.
Innovation Solution
A method involving the formation of a sacrificial layer pattern in the substrate, which allows for the creation of a through electrode after completing the wiring process, avoiding thermal stress and preventing copper diffusion, by using an insulating material with high etch selectivity and removing the sacrificial layer to form a precise opening for the electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper is used as conductive metal layer in TSV structure, then electrical resistance is reduced, but copper diffuses into silicon substrate causing device deterioration
Solution Approach 1:
The patent introduces a barrier layer as an intermediary between the copper conductive layer and the silicon substrate. This barrier layer prevents copper atoms from diffusing into the silicon while maintaining electrical conductivity, thus resolving the contradiction between low resistance and preventing copper diffusion.
Solution Approach 2:
The patent employs a sacrificial layer that is temporarily present during manufacturing to protect the substrate during etching processes, then completely removed afterward. This disposable layer prevents substrate damage during fabrication but is not present in the final device, eliminating long-term harmful effects.
2Productivity
If TSV is formed prior to back end processing, then through electrode is established early, but thermal stress occurs due to thermal expansion difference between metal and substrate
Solution Approach 1:
The patent performs preliminary actions during back-end processing including forming the barrier layer, creating the opening, depositing copper, and planarizing the substrate surface. The through electrode is completed as a final step after all high-temperature processing is done, avoiding thermal stress while maintaining productivity.
3Manufacturing precision
If opening is formed in substrate to create TSV, then through electrode path is established, but misalignment problem of through electrode between upper wiring occurs
Solution Approach 1:
The patent forms a sacrificial layer pattern before etching the opening, which serves as a precise alignment template. This preliminary structure ensures that the opening is accurately positioned relative to upper wiring layers, preventing misalignment while enabling through electrode formation.
Solution Approach 2:
The patent replaces traditional mechanical alignment methods with chemical etching processes that use the sacrificial layer pattern as a mask. This substitution provides more precise alignment control through chemical selectivity rather than mechanical positioning.
4Ease of manufacture
If conductive metal layer is exposed during etch process, then through electrode structure is formed, but metal diffuses into substrate deteriorating semiconductor device
Solution Approach 1:
The patent introduces a barrier layer as an intermediary between the copper conductive layer and the silicon substrate. This barrier layer prevents copper atoms from diffusing into the silicon while maintaining electrical conductivity, thus resolving the contradiction between low resistance and preventing copper diffusion.
Solution Approach 2:
The patent employs a sacrificial layer that is temporarily present during manufacturing to protect the substrate during etching processes, then completely removed afterward. This disposable layer prevents substrate damage during fabrication but is not present in the final device, eliminating long-term harmful effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures accurate alignment and desired aspect ratio of through electrodes, reduces thermal stress, and prevents copper diffusion, enhancing the manufacturing process for semiconductor devices with improved performance and reliability.
Implementation Method 1
forming a sacrificial layer pattern in a region that a through electrode will be formed to extend from a first surface of a substrate in a thickness direction of the substrate... The sacrificial layer pattern is removed from a second surface of the substrate to form an opening that exposes the wiring
Data Source
AI summary
In methods of manufacturing a semiconductor device, a substrate having a first surface and a second surface opposite to the first surface is prepared. A sacrificial layer pattern is formed in a region of the substrate that a through electrode will be formed. The sacrificial layer pattern extends from the first surface of the substrate in a thickness direction of the substrate. An upper wiring layer is formed on the first surface of the substrate. The upper wiring layer includes a wiring on the sacrificial layer pattern. The second surface of the substrate is partially removed to expose the sacrificial layer pattern. The sacrificial layer pattern is removed from the second surface of the substrate to form an opening that exposes the wiring. A through electrode is formed in the opening to be electrically connected to the wiring.