Through-Electrode Chip Structure for Stable Stacked Bonding
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving high integration, miniaturization, and operational speed, particularly in stacking semiconductor chips effectively to meet the demands of modern electronic products.
Innovation Solution
The semiconductor chip and package design includes a semiconductor substrate with a pad insulating layer, through electrodes with conductive plugs and barrier layers, and bonding pads that surround the through electrodes, enabling efficient electrical connections and supporting the stacking of multiple chips through direct bonding and wiring structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor chips are stacked to achieve high integration and miniaturization, then the density and functionality of the package are improved, but the manufacturing complexity and precision requirements increase
Solution Approach 1:
The through electrode is segmented into multiple functional layers: conductive plug (for electrical connection), conductive barrier layer (for protection and adhesion), and bonding pad (for inter-chip bonding). This segmentation allows each layer to be optimized independently for its specific function, enabling reliable stacked chip integration while managing manufacturing complexity through standardized layer structures
Solution Approach 2:
The conductive barrier layer is nested within the through electrode structure, surrounding the conductive plug. This nested configuration allows the barrier layer to provide protection and adhesion functions without adding significant external dimensions, enabling miniaturization while maintaining the necessary functional complexity for reliable bonding
2Length of moving object
If through electrodes are made smaller to support miniaturization, then the package size is reduced, but the risk of deformation during processing increases
Solution Approach 1:
The through electrode is constructed as a composite structure with a conductive plug (providing electrical conductivity) surrounded by a conductive barrier layer (providing mechanical strength, adhesion, and protection). This composite configuration allows the miniaturized through electrode to maintain structural integrity and resist deformation during processing while preserving electrical functionality
Solution Approach 2:
The conductive barrier layer is applied beforehand to the conductive plug, creating a protective cushion that prevents deformation during subsequent processing steps. This prior protection layer ensures that even when through electrodes are miniaturized, they maintain their structural stability throughout manufacturing operations
3Area of moving object
If bonding pads are positioned closer to through electrodes to reduce area, then the chip area is minimized, but the risk of electrical interference and manufacturing defects increases
Solution Approach 1:
The conductive barrier layer serves as an intermediary between the conductive plug and the bonding pad. It provides electrical isolation and mechanical buffering, allowing the bonding pad to be positioned closer to the through electrode without risking electrical interference or manufacturing defects. This intermediary layer enables area minimization while maintaining manufacturing precision
Data Source
AI summary
A semiconductor chip includes: a semiconductor substrate; a pad insulating layer on the semiconductor substrate; a through electrode which penetrates the semiconductor substrate and the pad insulating layer and includes a conductive plug and a conductive barrier layer surrounding a sidewall of the conductive plug; and a bonding pad which surrounds a sidewall of the through electrode and is spaced apart from the conductive plug with the conductive barrier layer disposed therebetween.


