Through Electrodes with Odd-Even Bump Routing for High-Density Interconnects
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Solution Overview
Problem
There is a challenge in achieving sufficient space for electrical connections between multiple semiconductor chips in multi-chip packages, limiting the performance and storage capacity of semiconductor devices.
Innovation Solution
The use of through electrodes penetrating the substrate, with odd-numbered electrodes connected to front-side bumps and even-numbered electrodes connected to backside bumps, along with specific metal layer and diffusion barrier patterns, allows for efficient electrical connections and increased integration density without leakage issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor chips are assembled in a single package to increase capacity, then the storage capacity is improved, but the space for electrical connections between chips becomes insufficient
Solution Approach 1:
The patent transitions from planar connection arrangements to three-dimensional vertical stacking with through-electrode connections. Multiple chips are stacked in the vertical dimension and connected via TSVs penetrating through the substrate thickness, enabling high-density interconnections without consuming additional planar area. This dimensional transition resolves the contradiction between increasing chip quantity and maintaining connection space.
2Reliability
If through silicon vias are formed to penetrate multiple chips, then the electrical and physical connections between stacked chips are improved, but the manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming TSVs, seed metal layers, and diffusion barrier patterns during the substrate fabrication process before chip assembly. The through-electrode structures are pre-configured in the substrate with proper metallization layers and barrier structures, so that when chips are stacked and bonded, reliable electrical connections are immediately established without requiring complex post-assembly processing.
3Reliability
If seed metal layers are not completely removed between through electrodes, then leakage currents occur, but complete removal increases manufacturing difficulty
Solution Approach 1:
The patent introduces diffusion barrier patterns as intermediary structures between the through-electrode metal layers and the substrate. These barrier patterns serve as both protective layers preventing metal diffusion and as etch stop layers that enable complete removal of seed metal. The intermediary barrier structure resolves the contradiction by providing a controlled interface that facilitates complete seed metal removal while preventing leakage paths.
Data Source
AI summary
A semiconductor device includes a substrate having a first surface and a second surface that are opposite to each other, a plurality of through electrodes penetrating the substrate and extending from the first surface to the second surface, front-side bumps disposed on the first surface and connected to odd-numbered through electrodes among the plurality of through electrodes, and backside bumps disposed on the second surface and connected to even-numbered through electrodes among the plurality of through electrodes. Related semiconductor packages, fabrication methods, electronic systems and memory cards are also provided.