Through-Hole Plating via Printing for Solar Cells
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Solution Overview
Problem
Existing methods for through-hole plating in solar cells, such as metal wrap through (MWT) cells, face challenges in efficiently and reliably connecting the front side to the back side while minimizing shading and avoiding complex photolithographic processes, which can lead to high material consumption and process uncertainties.
Innovation Solution
A method involving multiple printing processes to apply an insulating and conductive layer around the through-hole, allowing for efficient electrical connection of the front side from the back side, using a semiconductor wafer with III-V subcells and a substrate, where the through-hole is formed with a continuous side wall and edge regions, and the layers are conditioned through baking steps to ensure reliable protection and connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithographic processes are used for through-hole plating, then manufacturing precision can be achieved, but device complexity and material consumption increase
Solution Approach 1:
The patent extracts and removes the photolithographic process step from the through-hole plating method, replacing it with direct printing techniques. This eliminates the need for photoresist materials, development baths, and other photolithography-related equipment and chemicals, thereby reducing device complexity while maintaining manufacturing precision through the printing process's inherent accuracy
Solution Approach 2:
The printing process serves multiple functions simultaneously: it applies the conductive layer, defines the pattern geometry, and creates the through-hole plating structure in a single step. This multi-functionality replaces the sequential operations of photolithography (coating, patterning, etching, stripping), reducing both process complexity and material consumption while achieving the required manufacturing precision
2Reliability
If conventional through-hole plating methods are used, then electrical connection is achieved, but material consumption increases
Solution Approach 1:
The patent applies material only where needed through direct printing onto the through-hole structure. The conductive layer is deposited precisely in the through-hole region and on the substrate surface, avoiding unnecessary material application in surrounding areas. This localized material application maintains electrical connection reliability while significantly reducing overall material consumption compared to conventional blanket coating methods
Solution Approach 2:
The through-holes are pre-formed in the substrate before the conductive layer is applied through printing. This preliminary action allows the printing process to target only the necessary areas, enabling precise material placement that reduces waste while ensuring reliable electrical connections are formed exactly where required in the final product
3Manufacturing precision
If multiple printing processes are used for layer application, then manufacturing precision and reliability improve, but process time increases
Solution Approach 1:
The patent combines the insulating layer application and conductive layer application into a single printing process sequence. By integrating multiple layer deposition steps into one coordinated printing operation, the method achieves high manufacturing precision for each layer while reducing the cumulative process time that would result from separate, sequential processing steps
Solution Approach 2:
The printing process operates continuously to deposit both insulating and conductive layers without interrupting the manufacturing flow. The printer maintains continuous operation, moving from one layer to the next in an uninterrupted sequence, which preserves manufacturing precision through consistent deposition conditions while minimizing idle time and process interruptions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the electrical connection of solar cell stacks, reduces material consumption and process uncertainties, and increases reliability and yield, enabling the production of high-efficiency solar cells with reduced shading and lower technical effort.
Implementation Method 1
an insulating layer is applied to part of the first edge region, the side wall, and to the second edge region by means of a first printing process
Implementation Method 2
the layers are conditioned through baking steps to ensure reliable protection and connection
Data Source
AI summary
A method for plating by means of a through-hole on a semiconductor wafer at least comprising the steps: providing a semiconductor wafer having a top side and a bottom side, wherein the semiconductor wafer has a plurality of solar cell stacks and comprises a substrate on the bottom side, and each solar cell stack has at least two III-V subcells, disposed on the substrate, and at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall, wherein the through-hole has a first edge region on the top side and a second edge region on the bottom side; applying an insulating layer to part of the first edge region, the side wall, and to the second edge region by means of a first printing process; and applying an electrically conductive layer.