Through-Hole Sidewall Uniformity via Pulsed Plasma Etching
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Solution Overview
Problem
Conventional semiconductor element fabrication methods result in periodic recesses and bellows-like concavo-convex structures on through-hole sidewalls, leading to degraded uniformity and adhesion of insulating films, and subsequently, unreliable through-electrodes due to discontinuous seed layers and potential void formation during conductive material filling.
Innovation Solution
A semiconductor element and fabrication method that form a stripe-like concavo-convex structure on the sidewall of through-holes using dry etching with an etching gas containing oxygen, and by adjusting the etching process parameters such as substrate bias and gas composition to suppress sidewall etching, ensuring uniform adhesion and reliable conductive material filling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the Bosch process is used to form through-holes by repeatedly alternating between etching and deposition steps, then anisotropic etching with high etching rates can be achieved, but periodic recesses and bellows-like concavo-convex structures are formed on the sidewalls of through-holes
Solution Approach 1:
The patent applies periodic action by using a pulsed RF power supply to alternately generate plasma and non-plasma periods during the etching process. During plasma periods, etching occurs; during non-plasma periods, no etching occurs. This periodic plasma generation creates uniform etching without the need for repeated deposition steps, thereby avoiding bellows-like structures while maintaining high etching rates through optimized pulse timing and power control.
Solution Approach 2:
The patent changes the parameter of power supply mode from continuous to pulsed RF power. By controlling the duty cycle, frequency, and amplitude of the pulsed power, the etching process achieves uniform sidewalls while maintaining high etching rates. The pulsed nature allows precise control of ion bombardment and radical generation, creating optimal conditions for anisotropic etching without sidewall damage or deposition-induced structures.
2Reliability
If insulating films are deposited on bellows-like concavo-convex sidewalls, then through-holes can be insulated, but the uniformity and adhesion of insulating films are degraded
Solution Approach 1:
By using pulsed plasma etching instead of the Bosch process with repeated deposition, the patent eliminates bellows-like structures from the sidewalls. This creates smooth, uniform surfaces that naturally improve the uniformity and adhesion of subsequently deposited insulating films, while still achieving the required insulation function through the etched geometry alone.
3Reliability
If seed layers are formed on insulating films with degraded uniformity, then through-electrodes can be formed, but the seed layers become discontinuous and voids form during conductive material filling
Solution Approach 1:
The pulsed plasma etching process creates uniform sidewalls without bellows-like structures, providing a consistent substrate for seed layer deposition. This uniform surface ensures continuous seed layer formation with proper adhesion, preventing voids during subsequent conductive material filling while maintaining reliable through-electrode formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the reliability of through-electrodes by enhancing the adhesion and uniformity of insulating and seed layers, reducing voids and increasing the stability of the semiconductor element, while also reducing the size of semiconductor devices and improving stacked chip layering technology.
Implementation Method 1
the etching gas is dissociated to generate plasma by applying an electromagnetic wave in a chamber used in the dry etching method
Implementation Method 2
The bombardment described above sputters Si (silicon) in the semiconductor substrate 2 to continue chemical reaction of Si with F ions and F radicals to etch the material of the semiconductor substrate 2
Implementation Method 3
A substrate bias is applied to the semiconductor substrate 2 in order to accelerate charged F ions in the direction of the thickness of the semiconductor substrate 2
Implementation Method 4
F radicals which carry no charge diffuse not only in the direction of the thickness of the semiconductor substrate 2 but in all directions
Implementation Method 5
a deposition step in which C4F8 (octafluorocyclobutane) gas is used to deposit a fluorocarbon polymer on the sidewall of the hole as a passivation film
Data Source
AI summary
A semiconductor element is provided that includes a semiconductor substrate, a circuit element disposed on the substrate, and a through-hole formed in the substrate having a stripe-like concavo-convex structure on its sidewall with stripes formed in the direction of the thickness of the semiconductor substrate.