Semiconductor Package Through-Hole Underfill for Warpage Stability
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Solution Overview
Problem
Semiconductor packages face challenges in achieving high performance, rapid operating speeds, and compact sizes due to warpage issues caused by heat generation, which affect their structural stability and heat radiation efficiency.
Innovation Solution
A semiconductor package design that includes a lower and upper package with through holes and an under-fill part with a different thermal expansion coefficient, which fills the space between the packages and extends into the through holes to compensate for thermal expansion differences and enhance structural stability and heat radiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If semiconductor chips are vertically stacked to achieve high-density integration, then the device area is reduced, but heat generation increases causing warpage and structural instability
Solution Approach 1:
An under-fill part is introduced as an intermediary material between the lower package and upper package. This under-fill part has a thermal expansion coefficient different from the package substrate, acting as a mediator to compensate for thermal expansion differences and reduce warpage, thereby maintaining structural stability in the vertically stacked configuration
Solution Approach 2:
The thermal expansion coefficient parameter of the under-fill part is specifically selected to be different from that of the package substrate. By changing this material parameter, the system compensates for thermal expansion differences caused by heat generation, reducing warpage and maintaining structural stability while preserving the compact stacked design
2Temperature
If through holes are created in the package substrate to accommodate the under-fill part, then heat radiation efficiency is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The through hole formation process is segmented into distinct steps: forming the first through hole penetrating the package substrate, and forming the second through hole penetrating the molding part. This segmentation allows for systematic manufacturing while achieving improved heat radiation through the under-fill part extending through both holes
Solution Approach 2:
The first through hole is formed in the package substrate before mounting the upper package, and the second through hole is formed in the molding part subsequently. This preliminary action sequence allows the under-fill part to be properly positioned and extend through both holes, achieving heat radiation efficiency without excessive manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design reduces warpage and increases structural stability, while also improving heat radiation efficiency by using an under-fill part with a unique thermal expansion coefficient that compensates for thermal expansion differences between the packages.
Implementation Method 1
an under-fill part with a different thermal expansion coefficient, which fills the space between the packages and extends into the through holes to compensate for thermal expansion differences
Implementation Method 2
improving heat radiation efficiency by using an under-fill part with a unique thermal expansion coefficient that compensates for thermal expansion differences between the packages
Data Source
AI summary
A semiconductor package including: a first package; a second package on the first package, the second package including a second package substrate, first and second semiconductor chips on the second package substrate, and a second molding part on the second package substrate and covering the first and second semiconductor chips; and a fill part between the first package and the second package, a first through hole that penetrates the second package substrate, the first through hole being between the first and second semiconductor chips, a second through hole that penetrates the second molding part, the second through hole being connected to the first through hole, and wherein the fill part has an extension disposed in the first through hole and the second through hole.