Through-Holed Interposer with Protruding Conductive Gel
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The rapid development of semiconductor chips with critical dimensions less than 45 nm and high layout density poses challenges due to the fragility of low-k dielectric materials and mismatched thermal expansion coefficients with packaging substrates, leading to cracking and the lack of suitable packaging substrates for high-density chip layouts.
Innovation Solution
A through-holed interposer with TSVs and a redistribution layer is introduced between the packaging substrate and semiconductor chip, featuring conductive gels with protruding ends for enhanced bonding and a circuit redistribution structure, which matches the thermal expansion coefficients of the silicon wafer, thereby improving reliability and allowing for high-density chip layouts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If low-k dielectric material is used in BEOL for semiconductor chips with critical dimension less than 45 nm, then manufacturing precision is improved, but reliability deteriorates due to cracking from thermal expansion mismatch
Solution Approach 1:
An interposer is introduced as an intermediary component between the packaging substrate and the semiconductor chip. The interposer has a thermal expansion coefficient that matches the semiconductor chip, serving as a thermal expansion buffer that absorbs the mismatch between the packaging substrate and the chip, thereby preventing cracking while enabling the use of low-k dielectric materials
2Productivity
If semiconductor chip layout density is increased to meet lighter and smaller product demands, then productivity is improved, but device complexity increases making packaging difficult
Solution Approach 1:
The packaging system is segmented into three distinct components: the packaging substrate, the interposer, and the semiconductor chip. This segmentation allows each component to be optimized independently - the packaging substrate can have a coarse pitch suitable for manufacturing, the interposer provides thermal expansion matching and circuit redistribution, and the chip can achieve high layout density without directly interfacing with the packaging substrate's pitch constraints
3Adaptability or versatility
If pitch of flip-chip soldering pads is reduced to match high-density chip layouts, then adaptability is improved, but manufacturing precision requirements increase significantly
Solution Approach 1:
The pitch mismatch problem is resolved by introducing an intermediate dimension through the interposer. The packaging substrate maintains its original micro-meter scale pitch, the interposer provides a transition layer with intermediate pitch, and the chip connects at the nano-meter scale. This dimensional transition enables high-density chip layouts without requiring the packaging substrate to manufacture at impractically small pitch dimensions
Data Source
AI summary
A through-holed interposer is provided, including a board body, a conductive gel formed in the board body, and a circuit redistribution structure disposed on the board body. The conductive gel has one end protruding from a surface of the board body, and an area of the protruded end of the conductive gel that is in contact with other structures (e.g., packaging substrates or circuit structures) is increased, thereby strengthening the bonding of the conductive gel and reliability of the interposer.