Through-Insulator Via Interposer Structure for Low Parasitic Capacitance

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Solution Overview

Problem

Existing semiconductor devices face performance degradation due to high parasitic capacitance in through-silicon vias (TSVs), which are difficult to control in miniaturized designs.

Innovation Solution

The introduction of a through-insulation via (TIV) structure that penetrates the interposer, reducing parasitic capacitance and allowing better control over depth through the use of protection layers and cavities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through-silicon via (TSV) is used to electrically connect components, then electrical connection is achieved, but parasitic capacitance increases and performance degrades

Engineering Contradiction:
Improveelectrical connectionVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an insulation layer as an intermediary material between the conductive via and the interposer substrate. This insulation layer (e.g., silicon oxide, silicon nitride) acts as a mediator that electrically isolates the conductive via from the substrate, thereby reducing parasitic capacitance while maintaining the electrical connection function through the via structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If through-silicon via (TSV) is used for connection, then electrical connectivity is provided, but depth control becomes difficult requiring polishing techniques

Engineering Contradiction:
Improveelectrical connectivityVSAvoiddepth control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies a protection layer over the interposer substrate before forming the conductive via. This protection layer is patterned to define the via opening and serves as a depth reference during via formation. The via is etched through the substrate to expose the protection layer, which then acts as a stop layer, automatically limiting the via depth without requiring subsequent polishing operations.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If TSV structure is used, then component connection is achieved, but miniaturization becomes difficult due to control issues

Engineering Contradiction:
Improvecomponent connectionVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent replaces the mechanical polishing process with a chemically-controlled etching process. The protection layer serves as a chemical stop layer that automatically terminates the etching process at the desired depth. This substitution eliminates the need for complex polishing machinery and procedures, enabling better control in miniaturized devices where precise via depth is critical.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12406933B2Semiconductor device including through-insulator via structure
Publication Date: 2025.09.02 NAN YA TECH
  • US12406933B2 patent drawing
  • US12406933B2 patent drawing
  • US12406933B2 patent drawing

AI summary

A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes an interposer, a conductive via, an insulation layer, and a first electronic component. The interposer has a first surface and a second surface opposite to the first surface. The conductive via extends between the first surface and the second surface of the interposer. The insulation layer separates the conductive via from the interposer. The first electronic component is disposed on the second surface and electrically connected to the conductive via.