Through-Package Interconnects for Semiconductor Footprint Reduction
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Solution Overview
Problem
Conventional semiconductor device assemblies have a large footprint due to the presence of bond pads, which occupy a significant portion of the perimeter and contribute to the overall surface area, necessitating a reduction in surface area occupancy for compact electronic products.
Innovation Solution
The implementation of through-package interconnects that extend through the casings of semiconductor device packages, eliminating the need for perimeter solder balls and allowing the interconnects to be inboard, thereby reducing the package spacing and overall footprint, while maintaining electrical connectivity through solder balls and wirebonds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bond pads are used at the perimeter of the package, then electrical connectivity is achieved, but the footprint and surface area occupancy increase
Solution Approach 1:
The patent moves interconnects from the two-dimensional perimeter (bond pads at edges) to the third dimension by extending through-package interconnects vertically through the package body. This allows electrical connectivity to be achieved through the package thickness rather than requiring perimeter space, effectively trading vertical space for horizontal space reduction.
Solution Approach 2:
The through-package interconnects are nested within the package body, extending from the top surface through the package to the bottom surface. This nesting approach allows the interconnects to occupy the internal volume of the package rather than requiring external perimeter space, reducing the overall footprint while maintaining connectivity.
2Reliability
If perimeter solder balls are used for connectivity, then electrical connection is established, but package spacing increases the overall assembly footprint
Solution Approach 1:
The patent extracts the interconnect function from the perimeter location (where solder balls would be placed) and relocates it to the center of the package through the through-package interconnects. This extraction eliminates the need for perimeter solder balls and reduces the spacing required between adjacent packages in an array.
3Reliability
If bond pads occupy the perimeter portion, then electrical coupling is achieved, but the contribution to overall projection height increases
Solution Approach 1:
The patent transitions the electrical coupling approach from a horizontal two-dimensional arrangement (bond pads at the perimeter) to a vertical three-dimensional arrangement (through-package interconnects extending through the package thickness). This dimensional change allows the interconnects to contribute minimally to the projection height while achieving the same electrical coupling function.
Data Source
AI summary
Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.