Through-Silicon Via Scan Cells for Minimal-Contact Testing
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Solution Overview
Problem
Testing of through silicon/substrate vias (TSVs) in integrated circuit dies and stacks is resource-intensive and costly due to the need for extensive testing of thousands of connections, requiring expensive testers and complex setups.
Innovation Solution
A scan architecture with circuits and scan cells is employed to test TSV paths, allowing access with a minimum number of contacts and using low-cost testers, enabling efficient testing of TSV connectivity and resistance through controlled stimulus and response mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional testing methods are used to test thousands of TSV connections, then testing coverage is improved, but testing cost and resource requirements increase significantly
Solution Approach 1:
The patent segments the TSV testing function by introducing scan cells that are distributed throughout the die, with each scan cell responsible for testing a specific TSV or group of TSVs. This segmentation allows the testing function to be distributed across many simple units rather than requiring a single complex testing system, thereby maintaining comprehensive testing coverage while reducing overall system complexity and cost
Solution Approach 2:
The patent introduces scan cells as intermediary elements between the TSVs and the testing equipment. These scan cells act as mediators that simplify the interface between the complex TSV network and the external tester, enabling thousands of TSVs to be tested through a reduced set of contact points and using simpler, more affordable testing equipment
2Reliability
If traditional testing methods are used to test thousands of TSV connections, then testing coverage is improved, but tester cost increases
Solution Approach 1:
By segmenting the testing function into distributed scan cells, the patent enables the use of simpler, less expensive testers that can communicate with the scan cells through a reduced set of contact points, thereby maintaining comprehensive testing coverage while significantly reducing tester cost
Solution Approach 2:
The patent uses multiple identical scan cells distributed throughout the die, each performing the same basic testing function. This copying approach allows a single, relatively simple tester design to control and test thousands of TSVs by communicating with many identical scan cell units, thereby reducing the cost and complexity of the required testing equipment
3Ease of manufacture
If scan architecture is used to test TSV paths, then equipment cost is reduced, but testing methodology complexity increases
Solution Approach 1:
The scan cells are designed to be self-contained units that autonomously perform their testing functions through standardized scan chain protocols. Each scan cell can independently capture, hold, and shift test data, requiring minimal external control complexity. This self-service capability allows the use of simpler, less expensive testers while maintaining systematic testing coverage across all TSVs
Data Source
AI summary
In one example, an integrated circuit comprises a die. The die has a first surface and a second surface, the second surface opposite to the first surface. The die also includes: a first contact on the first surface and a second contact on the second surface; a through silicon via having a first end and a second end, the first end coupled to the first contact and the second end coupled to the second contact; and a scan cell having a control input, a response input, and a stimulus output, the response input coupled to the first end and the stimulus output coupled to the second end.