Through-Stack Contact Via Structures for 3D Memory
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in providing compact electrical connections between electrically conductive layers and underlying conductive structures, leading to significant area usage with existing multi-metal via and metal line configurations.
Innovation Solution
The implementation of through-stack contact via structures in a contact region, where conductive via structures directly contact the top surfaces of electrically conductive layers and are insulated from a subset of these layers, allowing for more compact and efficient electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-metal via and metal line configurations are used for electrical connections, then electrical connectivity is achieved, but area usage increases significantly
Solution Approach 1:
The patent combines multiple via structures into a single through-stack contact via that penetrates the entire alternating stack of insulating and conductive layers. This merging approach eliminates the need for separate multi-metal via configurations, achieving electrical connectivity while significantly reducing the area occupied by connection structures.
Solution Approach 2:
The invention transitions from a planar multi-metal via configuration to a vertical through-stack configuration. By extending the via structure through the entire stack in the vertical dimension, the patent achieves three-dimensional integration that reduces footprint area while maintaining electrical connectivity to multiple conductive layers.
2Area of stationary object
If through-stack contact via structures are implemented, then area usage is reduced, but manufacturing complexity increases
Solution Approach 1:
The through-stack contact via structure is divided into multiple segments or portions, each occupying a different horizontal plane within the alternating stack. This segmentation allows the via to contact multiple conductive layers at different heights while maintaining a unified vertical structure, simplifying the manufacturing process compared to creating multiple separate vias.
Solution Approach 2:
The single through-stack contact via structure serves multiple functions: it provides electrical connectivity to multiple conductive layers simultaneously, acts as a unified connection point for signal routing, and reduces overall device area. This multi-functionality consolidates what would otherwise require multiple separate structures, reducing manufacturing complexity.
Data Source
AI summary
A three-dimensional memory device includes conductive structures located over a substrate, an alternating stack of insulating layers and electrically conductive layers formed over the conductive structures, and an array of memory structures formed through the alternating stack. Each of the memory structures includes memory elements located at levels of the electrically conductive layers. A contact region can be formed on the alternating stack. Two-stage contact via cavities having a greater width above a top surface of a respective electrically conductive layer and having a narrower width through the alternating stack can be formed in the contact region. Upper insulating spacers and lower insulating spacers are formed such that annular surfaces of the respective electrically conductive layer are physically exposed. Two-stage contact via structures can provide electrical contact between the electrically conductive layers and the conductive structures.