Through-Stack Contact Via Structures for 3D Memory Devices
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming through-stack contact via structures that extend through an upper-tier alternating stack, which affects the integration and performance of memory cells.
Innovation Solution
The formation of a multi-tier three-dimensional memory device with through-stack contact via structures involves a method that includes a first-tier alternating stack of insulating and conductive layers, a retro-stepped dielectric material portion, and a second-tier alternating stack, where contact via structures extend vertically through the alternating stacks and the retro-stepped dielectric material to connect electrically conductive layers, facilitated by the creation of dielectric wall structures and moat trenches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-stack contact via structures are formed to extend through upper-tier alternating stacks, then electrical connectivity between tiers is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The alternating stacks are divided into separate tiers (first-tier and second-tier) with distinct contact via structures for each tier. This segmentation allows independent formation and optimization of contact vias in each tier, reducing overall manufacturing complexity while maintaining electrical connectivity through each stack.
Solution Approach 2:
A dielectric material is introduced as an intermediary substance to fill spaces and provide structural support between the alternating stacks and contact via structures. This intermediary material facilitates the formation of through-stack contact vias by providing a stable matrix for via formation and reducing direct structural complexity.
2Adaptability or versatility
If through-stack contact via structures are formed to extend through upper-tier alternating stacks, then memory cell integration is improved, but manufacturing process difficulty increases
Solution Approach 1:
The alternating stacks are formed and structured in advance (pre-formed) before the contact via structures are created. This preliminary action allows the stacks to be prepared with optimized dimensions and material compositions, making subsequent via formation easier and more adaptable to different memory cell configurations.
Solution Approach 2:
Different regions of the device are assigned different properties: the alternating stacks have specific material compositions and dimensions optimized for electrical performance, while the contact via regions have tailored geometries and material fills optimized for manufacturing. This local quality differentiation improves integration flexibility while simplifying manufacturing processes for each specific function.
Data Source
AI summary
A first-tier structure includes a first vertically alternating sequence of first continuous insulating layers and first continuous sacrificial material layers and a first-tier retro-stepped dielectric material portion overlying first stepped surfaces of the first vertically alternating sequence. A second vertically alternating sequence of second continuous insulating layers and second continuous sacrificial material layers is formed over the first-tier structure. A vertically alternating stack of insulating plates and dielectric material is formed over the first-tier retro-stepped dielectric material portion. Alternatively, dielectric pillar structures may be formed in lieu of the vertically alternating stack. After formation of memory stack structures, electrically conductive layers replace portions of the first and second continuous sacrificial material layers. Contact via structures are formed through the vertically alternating stack or the dielectric pillar structures, through the first retro-stepped dielectric material portion, and directly on a first subset of the electrically conductive layers.


