Through Substrate Diode for High Voltage SOI Transistors
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Solution Overview
Problem
Integrating extended drain MOS transistors on silicon on insulator (SOI) substrates is challenging due to the limitations of buried oxide layer thickness, which affects off-state leakage current and increases fabrication complexity and cost when attempting to operate at higher voltages than the breakdown voltage of the buried oxide layer.
Innovation Solution
Incorporating a through substrate diode with a p-n junction adjacent to a via extending from the SOI film through the buried oxide layer to the handle wafer, allowing for reverse biasing to reduce the electric field across the buried oxide layer, thereby enabling operation at higher voltages without increasing off-state leakage current or fabrication complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the thickness of the buried oxide layer is increased to accommodate higher voltage operation, then the breakdown voltage increases, but the off-state leakage current increases
Solution Approach 1:
A through substrate diode is introduced as an intermediary structure to manage the electric field distribution. The diode includes a p-n junction formed in the handle wafer and a via structure extending through the buried oxide layer, acting as a mediator to reduce the electric field across the buried oxide without increasing its thickness, thereby maintaining low leakage current while enabling higher voltage operation.
Solution Approach 2:
The invention changes the electrical parameters of the substrate by forming a through substrate diode with specific p-n junction characteristics. By adjusting the doping profiles and via dimensions, the electric field distribution is modified to allow higher voltage operation without proportionally increasing the buried oxide thickness, thus decoupling the relationship between breakdown voltage and leakage current.
2Strength
If an aperture is formed in the buried oxide layer to accommodate a p-n junction, then the electric field across the buried oxide layer is reduced, but fabrication cost and complexity increase
Solution Approach 1:
The through substrate via structure serves multiple functions: it provides the p-n junction formation region, acts as an electric field reduction structure, and can simultaneously serve as a contact structure for the extended drain MOS transistor. This multi-functionality eliminates the need for separate aperture formation steps, reducing fabrication complexity while achieving the desired electric field reduction.
Solution Approach 2:
The invention merges the p-n junction formation with the via structure creation. Instead of forming a separate aperture and then creating a p-n junction, the p-n junction is formed within the via structure itself, combining two functions into one integrated structure. This reduces the number of fabrication steps and simplifies the overall process.
3Strength
If the SOI layer thickness is increased to operate at higher voltages, then the breakdown voltage increases, but the off-state leakage current in short channel MOS transistors increases
Solution Approach 1:
The substrate structure is segmented into distinct functional regions: the handle wafer containing the p-n junction, the buried oxide layer maintaining its original thickness for low leakage, and the SOI film for transistor operation. The through substrate diode creates a segmented path for electric field management, allowing the buried oxide to remain thin while still supporting higher voltage operation through the diode's field reduction effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The through substrate diode effectively reduces the electric field across the buried oxide layer, allowing extended drain MOS transistors to operate at higher voltages without increasing off-state leakage current or degrading performance, while maintaining cost-effectiveness and simplicity in fabrication.
Implementation Method 1
the through substrate diode has a through substrate via containing an electrically conductive via fill plug contacting the handle wafer of the SOI substrate. A p-n junction is formed adjacent to a boundary of the through substrate via, so that the handle wafer under the through substrate diode may be depleted by reverse biasing the p-n junction.
Data Source
AI summary
An integrated circuit on an SOI substrate containing an extended drain MOS transistor with a through substrate diode in a drain (n-channel) or body region (p-channel) so that the drain or body region is coupled to the handle wafer through a p-n junction. An integrated circuit on an SOI substrate containing an extended drain MOS transistor with a through substrate diode in a drain (n-channel) or body region (p-channel) coupled to the handle wafer through a p-n junction, that is electrically isolated from the drain or body region. A process of forming an integrated circuit on an SOI substrate containing an extended drain MOS transistor with a through substrate diode in a drain (n-channel) or body region (p-channel).