Through-Via Formation via Direct Bonding and Porous Region Dissolution
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Solution Overview
Problem
The existing methods for forming electrically conducting through-vias in integrated circuits face challenges such as the difficulty in implementing high-temperature fabrication steps and the potential damage to integrated circuits during the removal of rigid supports, which limits the thinning of semiconductor supports and requires adhesive use, restricting temperature and adhesive cleaning processes.
Innovation Solution
The method involves forming insulating layers and direct bonding without an adhesive, using a porous region and electrochemical processes to create electrically conducting through-vias, allowing for the thinning of silicon substrates and assembly of three-dimensional integrated structures without the need for adhesive support removal, enabling the reuse of rigid supports.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If adhesive is used to fix the rigid support on the front face of the integrated circuit, then the rigid support can be securely attached, but it becomes difficult to implement high-temperature fabrication steps and requires adhesive removal which may damage the integrated circuit
Solution Approach 1:
The patent removes the adhesive layer from the system by using a rigid support that bonds directly to the semiconductor substrate without requiring adhesive. This eliminates the adhesive removal step and enables high-temperature processing up to 450°C or higher, as the direct bond can withstand these temperatures without degradation.
Solution Approach 2:
The patent changes the bonding interface from an adhesive-based connection to a direct substrate-to-rigid-support connection. This parameter change allows the system to withstand higher temperatures during fabrication and operation, eliminating the temperature limitation imposed by adhesive materials.
2Ease of manufacture
If the rigid support is removed after integrated circuit completion, then the adhesive cleaning step is required, but this may damage the integrated circuit and limit thinning to around 80 micrometers
Solution Approach 1:
The patent extracts the adhesive layer from the manufacturing process, using direct bonding between the rigid support and semiconductor substrate. This eliminates the need for adhesive removal steps that could damage the integrated circuit, thereby improving reliability while maintaining ease of manufacture.
Solution Approach 2:
The patent employs a brittle layer positioned between the rigid support and semiconductor substrate that can be selectively removed. This layer acts as a cushioning element that protects the integrated circuit during support removal, allowing the rigid support to be detached without damaging the underlying circuit structures.
3Ease of manufacture
If chemical agents are used to clean adhesive through cavities in the rigid support, then adhesive removal is enabled, but temperature limitations are imposed due to adhesive sensitivity
Solution Approach 1:
The patent removes the adhesive layer entirely by using direct bonding between the rigid support and semiconductor substrate. This eliminates the need for chemical cleaning agents and associated temperature limitations, allowing high-temperature processing without concern for adhesive degradation.
4Strength
If adhesive is used to fix the rigid support, then secure attachment is achieved, but the front face copper pillars must be covered with adhesive layer
Solution Approach 1:
The patent extracts the adhesive layer from the structure, enabling direct bonding between the rigid support and semiconductor substrate. This eliminates the need to cover copper pillars with adhesive, simplifying the layer structure while maintaining secure attachment through direct bonding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of electrically conducting through-vias without adhesive use, facilitating high-temperature processes and reducing damage to integrated circuits, enabling efficient thinning and assembly of three-dimensional structures while allowing for the reuse of rigid supports.
Implementation Method 1
forming a porous region by electrochemical dissolution of a semiconductor material
Implementation Method 2
direct bonding of the first insulating layer and of the additional insulating layer
Data Source
AI summary
A method is for formation of an electrically conducting through-via within a first semiconductor support having a front face and comprising a silicon substrate. The method may include forming of a first insulating layer on top of the front face of the first semiconductor support, fabricating a handle including, within an additional rigid semiconductor support having an intermediate semiconductor layer, and forming on either side of the intermediate semiconductor layer of a porous region and of an additional insulating layer. The method may also include direct bonding of the first insulating layer and of the additional insulating layer, and thinning of the silicon substrate of the first semiconductor support so as to form a back face opposite to the front face.