Through-Silicon Via Structure With Etch Stop Layer for Reliable Isolation
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Solution Overview
Problem
Existing semiconductor devices face challenges in developing physically and electrically reliable through silicon vias, particularly in controlling etching processes to prevent damage to wiring patterns and separating layers, which affects the reliability and efficiency of through via structures.
Innovation Solution
A semiconductor device design incorporating an etch stop layer between the semiconductor substrate and wiring pattern, with a multi-step etching process to form through holes, and a separating layer to prevent unwanted etching and improve electrical separation, utilizing a through via structure with a barrier pattern, seed pattern, and conductive via to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a through via structure is formed by etching through the semiconductor substrate, then electrical connection is achieved, but the wiring pattern and separating layer may be damaged by uncontrolled etching
Solution Approach 1:
An etch stop layer is formed on the semiconductor substrate before forming the through via. This etch stop layer serves as a protective barrier that prevents the etching process from damaging the wiring pattern and separating layer while still allowing the through via to be formed through the substrate.
Solution Approach 2:
The etch stop layer acts as an intermediary layer between the semiconductor substrate and the wiring pattern/separating layer. It mediates the etching process by being selectively etched to allow through via formation while protecting the underlying structures from damage.
2Manufacturing precision
If the etching process is extended to ensure complete penetration, then through via formation is achieved, but contact resistance increases and electrical separation is compromised
Solution Approach 1:
The etch stop layer is selectively positioned only where needed - on the semiconductor substrate but stopping before reaching the wiring pattern and separating layer. This local placement allows precise control of etching: the through via penetrates completely where required while maintaining electrical separation in other areas.
Solution Approach 2:
The etch stop layer changes the etching parameters by providing a selective etching front. It allows the etching process to proceed with controlled depth and speed, ensuring complete penetration for through via formation while preventing over-etching that would compromise electrical separation and increase contact resistance.
Data Source
Figure 1
Figure 2A
Figure 2B~2C
AI summary
Aspects of the present disclosure are related to a semiconductor device that includes a crystalline substrate having a first surface and a second surface vertically opposite each other and an insulating layer disposed on the first surface of the crystalline substrate. The device may also include an etch stop layer interposed between and contacting the crystalline substrate and the insulating layer and a conductive through via structure penetrating the crystalline substrate and the insulating layer. The device may also include an insulating separation layer disposed horizontally adjacent to the conductive through via structure, and having an inner wall and an outer wall. The insulating separation layer may include a first portion disposed between the conductive through via structure and the crystalline substrate, and a second portion disposed between the conductive through via structure and the etch stop layer.