Through-Substrate Via Layout With Isolation for Stress Relief
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to increase device density and reduce stress-related defects in semiconductor devices while maintaining high performance and yield, particularly in the formation of through-substrate vias and nanostructure transistors.
Innovation Solution
The formation of isolation structures and epitaxial structures before creating through-substrate vias, followed by the formation of epitaxial source/drain regions, reduces stress and allows for closer device placement, improving device density and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If through-substrate vias are formed directly without isolation structures, then manufacturing process is simpler, but stress-related defects increase and device density decreases
Solution Approach 1:
Isolation structures are formed in advance before through-substrate via formation. This preliminary action creates stress-relief zones that prevent stress-related defects in the final device, resolving the contradiction between process simplicity and reliability.
Solution Approach 2:
Isolation structures act as intermediary elements between the substrate and through-substrate vias. These intermediaries manage stress distribution and enable closer device placement without increasing stress-related defects, thus improving reliability while maintaining manufacturing feasibility.
2Productivity
If devices are placed closer together to increase density, then device density improves, but stress-related defects increase
Solution Approach 1:
The substrate is divided into regions with isolation structures that segment stress distribution. This segmentation allows devices to be placed closer together while the isolation structures prevent stress from propagating between adjacent devices, maintaining reliability at higher densities.
Solution Approach 2:
Isolation structures serve as intermediary stress-management elements between closely-spaced devices. They enable high device density by providing stress relief zones that prevent stress-related defects even when devices are in close proximity.
3Reliability
If isolation structures are formed before through-substrate vias, then stress-related defects are reduced, but manufacturing complexity increases
Solution Approach 1:
The formation of isolation structures is merged with the existing manufacturing process flow for through-substrate vias. By integrating these steps into the standard process sequence, the added complexity is minimized while achieving the reliability benefits of stress management.
Data Source
AI summary
A method includes forming first nanostructures over a first region of a substrate; forming second nanostructures over a second region of the substrate; forming a first gate structure around the first nanostructures; replacing the second nanostructures with isolation regions; and forming a through via extending through isolation regions and into the substrate.