3D Through-Via Liner Structure for Word Line Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the integration and stack height of three-dimensional semiconductor devices increase, forming through-via structures to supply power to string select lines becomes increasingly difficult, especially in forming finer patterns and ensuring electrical insulation from word lines.
Innovation Solution
The solution involves a three-dimensional semiconductor device design with a substrate having a cell area, extension area, and dummy area, featuring vertical channel structures, through-via structures with via plugs and liner layers, and word line stacks with alternating mold and sacrificial layers, where the via liner layers have protruding portions and dents to enhance electrical insulation and structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the integration degree and stack height are increased, then the device capacity and storage capability are improved, but the difficulty of forming through-via structures and ensuring electrical insulation increases
Solution Approach 1:
The via liner layer is segmented into multiple portions including a first portion, second portion, and third portion with different horizontal extents. This segmentation allows each portion to serve specific functions: the first portion provides electrical insulation, the second portion forms the protruding structure for mechanical interlocking, and the third portion ensures proper alignment. This segmented approach resolves the manufacturing difficulty by breaking down the complex via formation process into manageable stages with distinct functional requirements.
Solution Approach 2:
The via liner layer is designed with protruding portions that extend horizontally beyond the via plug, adding a dimensional element that provides both mechanical interlocking and electrical insulation. This horizontal extension creates an overlapping region between adjacent via liner layers, forming a continuous insulating barrier. The dimensional change from a simple cylindrical via to one with horizontal protrusions enables simultaneous achievement of structural integrity and electrical insulation in high-density configurations.
2Area of moving object
If finer patterns are formed to increase integration, then the device density is improved, but the electrical insulation between through-via structures and word lines becomes more difficult to maintain
Solution Approach 1:
The via liner layer exhibits local quality variations through its different portions. The first portion has a specific horizontal extent that provides electrical insulation, while the second portion extends further to create protruding structures. This localized differentiation ensures that electrical insulation is precisely applied where needed between via structures and word lines, while other portions serve structural or alignment functions. The local quality approach enables fine-patterned devices to maintain reliable electrical insulation despite reduced spacing.
3Reliability
If the gap between word lines and through-via structures is widened, then the electrical insulation is improved, but the device integration degree decreases
Solution Approach 1:
The via liner layer is nested within the via structure, with its protruding portions extending into the spaces between adjacent vias. This nesting creates an interlocking pattern where the protruding portions of one via liner layer overlap with the recesses of adjacent via liner layers. The nested configuration provides continuous electrical insulation without requiring large gaps between word lines and via structures, thereby maintaining high device integration while ensuring reliable electrical isolation.
Data Source
AI summary
A three-dimensional semiconductor device may include a substrate having a cell area and an extension area, a word line stack disposed above the substrate, the word line stack including mold layers and word lines alternately stacked, vertical channel structures vertically penetrating the word line stack in the cell area, and a first extension through-via structure vertically penetrating the word line stack in the extension area. The first extension through-via structure may include a first via plug and a first via liner layer surrounding sidewalls of the first via plug. The first via liner layer may include first dents respectively disposed at the same levels horizontally as the word lines of the word line stack.