Through-Via RDL Package Structure for Delamination-Free 3D IC Interconnects
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving efficient integration and electrical connectivity between three-dimensional integrated circuit (3D IC) devices and redistribution layers (RDLs), particularly due to issues with delamination and open contacts caused by seed layers or barrier layers in fan-out packaging processes.
Innovation Solution
The method involves forming through integrated fan-out vias (TIVs) that penetrate through RDL structures, using a seed layer and conductive posts to create electrical connections, and employing a dielectric layer and encapsulant to secure the package structure while avoiding delamination and open contacts, allowing for efficient electrical contact between the die and RDLs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If seed layers or barrier layers are used in fan-out packaging processes, then electrical connectivity between 3D IC devices and redistribution layers is achieved, but delamination and open contacts occur
Solution Approach 1:
The patent removes the problematic seed layer and barrier layer from the conventional fan-out packaging process. Instead of using these intermediate layers that cause delamination and open contacts, the method directly forms conductive posts through the dielectric layer to establish electrical connections, thereby eliminating the source of reliability issues while maintaining electrical connectivity
Solution Approach 2:
The patent introduces a via structure as an intermediary element to replace the function of seed layers and barrier layers. The via penetrates through the dielectric layer and provides a direct conductive path between the upper and lower interconnect layers, serving as a reliable mediator for electrical connectivity without causing delamination or open contacts
2Area of stationary object
If integrated fan-out packages are used to achieve compactness, then package area is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent divides the packaging process into distinct sequential steps: forming the dielectric layer, creating via structures, depositing conductive material, and forming interconnect layers. This segmentation allows each step to be optimized independently and simplifies the overall manufacturing process despite the compact package design, making the complex integrated fan-out structure more manufacturable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration density and electrical connectivity of 3D IC devices by ensuring reliable contact between TIVs and RDLs, reducing delamination and open contact issues, thereby improving the overall performance and yield of semiconductor packages.
Implementation Method 1
using a seed layer and conductive posts to create electrical connections, and employing a dielectric layer and encapsulant to secure the package structure while avoiding delamination and open contacts, allowing for efficient electrical contact between the die and RDLs
Data Source
AI summary
A package structure and a method of manufacturing the same are provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, a conductive terminal, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The conductive terminal is connected to the redistribution layer. The through via extends through the encapsulant and the redistribution layer to contact the conductive terminal and the second RDL structure.