Through-Via Residue Oxidation for Reliable 3D Semiconductor Interconnects
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Solution Overview
Problem
Conventional semiconductor package technologies face challenges such as signal loss, high power consumption, and design constraints due to two-dimensional interconnection methods, while three-dimensional integrated circuit (3D-IC) package technologies using through-silicon vias (TSVs) aim to address these issues but struggle with etch residue removal affecting electric reliability.
Innovation Solution
The method involves forming a semiconductor device with a metal pattern and a second structure, where a via hole is etched to expose the metal pattern, and the etch residue is oxidized and removed in-situ within a single process chamber, creating a recessed surface with varying roughness to enhance adhesion and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional two-dimensional wire-bonding interconnection is used, then device design flexibility is maintained, but signal loss and power consumption increase
Solution Approach 1:
The patent transitions from conventional two-dimensional wire-bonding interconnection to three-dimensional through-silicon via (TSV) interconnection. The TSV structure extends vertically through the substrate, enabling direct vertical connections between stacked semiconductor chips, thereby reducing wiring lengths and power consumption while maintaining design flexibility
2Reliability
If TSV-based 3D-IC package technology is used, then wiring lengths are reduced and IC placement density increases, but etch residue removal becomes difficult affecting reliability
Solution Approach 1:
The patent performs preliminary oxidation of etch residues immediately after the via etching process, converting organic etch residues into inorganic oxide compounds before subsequent cleaning steps. This preliminary action makes the residues more susceptible to removal and prevents contamination of the TSV structure
Solution Approach 2:
The patent introduces an oxidation process as an intermediary step between etching and cleaning. This oxidation process transforms the etch residues into a different chemical form (oxide) that can be more effectively removed by subsequent cleaning processes, thereby improving the ease of manufacture
3Loss of energy
If TSV-based 3D-IC package technology is used, then signal loss is reduced, but manufacturing process complexity increases
Solution Approach 1:
The patent combines the oxidation process with the existing via etching process by performing oxidation in the same process chamber immediately after etching. This merging of processes reduces the number of separate steps and equipment transitions, thereby managing manufacturing process complexity while achieving the benefit of reduced signal loss through improved via cleanliness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively removes etch residues, improving the adhesion strength between the through via and peripheral structures, thereby enhancing the electric reliability of semiconductor devices.
Implementation Method 1
oxidizing a first etch residue in the via hole to convert the first etch residue into an oxidized first etch residue
Implementation Method 2
reducing the metal oxide, before or after removing the oxidized first etch residue
Data Source
AI summary
Disclosed are semiconductor devices including through vias and methods of fabricating the same. The methods may include forming a first structure including a metal pattern and a second structure on the first structure. The metal pattern includes an upper surface facing the second structure. The methods may also include etching the second structure to form a via hole exposing the metal pattern, oxidizing a first etch residue in the via hole to convert the first etch residue into an oxidized first etch residue, and removing the oxidized first etch residue. After removing the oxidized first etch residue, the upper surface of the metal pattern may include a first portion that includes a recess and has a first surface roughness and a second portion that is different from the first portion and has a second surface roughness. The first surface roughness may be greater than the second surface roughness.